Analog/Mixed-Signal IC Design Engineer - Acacia

Job Title

Analog/Mixed-Signal IC Design Engineer - Acacia

Role Summary

Member of a mixed-signal IC design team developing high-speed, high-accuracy analog circuits for optical transceivers. Work across IC design, layout, measurement and productization for ultra-deep sub-micron CMOS chips used in fiber-optic transmission systems.

Experience Level

Senior-level. Role expects experienced analog/mixed-signal engineers with substantial industry experience (senior-level, typically 7+ years).

Responsibilities

Design, verify and deliver analog/mixed-signal blocks for high-speed optical transceiver ASICs; lead complex design work and coordinate across disciplines.

• Architect, design, simulate, layout, measure and productize high-speed AMS CMOS circuits.
• Lead design efforts for large blocks on complex chips; track deliverables and schedules.
• Mentor and review work of junior engineers; participate in peer reviews and design methodology.
• Collaborate with digital/DSP, packaging, system and hardware teams to meet signal and power integrity requirements.
• Develop and validate laboratory test setups; analyze measurement data and iterate designs to meet specs.

Requirements

Technical must-haves and relevant domain experience. Degrees and degree-related experience requirements are listed under Education Requirements below.

• Proven experience in design, simulation and measurement of high-speed ICs in at least three of these areas: high-speed serial links (serdes, data converters), modeling for system link simulations, high-performance output drivers, PLLs, clock transmission/propagation, op-amps/programmable gain amplifiers, and equalization techniques.
• Experience with ultra-deep sub-micron CMOS AMS design and mixed-signal verification.
• Ability to lead complex block-level design, perform layout review, and ensure manufacturability and producibility.
• Hands-on measurement and lab validation experience, including test setup construction and ESD-aware practices.
• Strong problem-solving, communication, and cross-functional collaboration skills.

Education Requirements

Minimum qualification specified by employer: Bachelor’s degree plus 8 years related experience, Master’s degree plus 6 years related experience, or PhD plus 3 years related experience. The posting does not specify particular fields of study or certifications.

Preferred Qualifications

Relevant skills and technologies that improve fit for the role.

• Experience with electrical transceiver applications (backplane and cable communications).
• Experience with FinFET and GAA process technologies.
• High-frequency layout experience, including floorplanning, analog/digital routing, and passive components (inductors, transformers, transmission lines).
• Design-for-manufacturability experience: PVT characterization, electromigration, self-heating, and IR drop analysis.
• Familiarity with lab validation, ESD methodology, and test fixture construction.
• Experience with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulation flows, and MATLAB.

Location and Work Model

Hybrid role: on-site in San Jose, CA three days per week.

Compensation

Employer posted a U.S./Canada starting salary range for this position: $168,800 to $241,200 (base pay range for new hires in those locations). Specific location-based ranges may vary.

About the Employer

Cisco develops networking and communications products. This position is part of the Acacia group focused on high-speed photonic transceivers.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).