Analog/mixed-signal IC Design Engineer - Acacia

Job Title

Analog/mixed-signal IC Design Engineer - Acacia

Role Summary

Member of the Acacia mixed-signal IC design team developing high-speed, high-accuracy analog circuits for optical transceivers (100G–1.6T+). Work spans architecture, circuit design, layout, measurement and production qualification.

This is a hybrid role based in San Jose, CA (three days per week on-site) collaborating with DSP/digital, package, system and module teams.

Experience Level

Senior. See Education Requirements for explicit degree + years guidance.

Responsibilities

Key responsibilities include:

• Architect, design, layout, and validate mixed-signal/analog ASIC blocks targeting ultra-deep sub-micron CMOS processes.
• Lead design efforts for large/complex blocks; track deliverables and schedules.
• Perform circuit simulation and lab characterization; diagnose and resolve issues from silicon bring-up to production.
• Mentor and provide technical guidance to team members; participate in peer reviews.
• Collaborate with packaging and hardware teams to meet signal integrity and power integrity requirements.
• Contribute to design methodology and documentation from concept through productization.

Requirements

Must-have technical skills and experience; preferred items are listed separately.

• Experience in design, simulation and measurement of high-speed ICs, including demonstrated work in at least three of the areas listed below.
• Relevant circuit topics (candidate must have experience in at least three):
  • High-speed serial links (serdes, data converters)
  • Modeling for system link simulations
  • High-performance output drivers
  • Phase-locked loops (PLLs)
  • Clock transmission/propagation and timing distribution
  • Op amps and programmable gain amplifiers
  • Equalization techniques
• Hands-on experience developing high-speed analog/mixed-signal circuits and bringing designs to silicon.
• Proven ability to lead block-level design activities and collaborate across disciplines (layout, package, system).
• Strong debugging and measurement skills in laboratory environments.
• Nice-to-have: experience with FinFET/GAA technologies, high-frequency layout and floorplanning, design-for-manufacturability (PVT characterization, IR drop, electromigration), ESD practices, and familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulations, and MATLAB.

Education Requirements

Requires one of the following: Bachelor's degree plus 8 years of related experience; Master's degree plus 6 years of related experience; or PhD plus 3 years of related experience. The posting does not specify fields of study or list certifications.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).