Analog/mixed-signal IC Design Engineer - Acacia

Job Title

Analog/mixed-signal IC Design Engineer - Acacia

Role Summary

Member of the Acacia mixed-signal IC design team developing high-speed, high-accuracy analog circuits for optical transceivers (100G–1.6T+). Work spans architecture, circuit design, layout, measurement and productization of ultra-deep-submicron CMOS ICs.

This is a hybrid role with three days per week expected on-site in San Jose, CA. You will collaborate with digital/DSP, package, system and module teams to meet product requirements.

Experience Level

Senior. Typical experience expectations: Bachelor’s + 8 years, Master’s + 6 years, or PhD + 3 years of related experience.

Responsibilities

Design, verify and bring to production high-speed analog/mixed-signal blocks for optical transceivers; lead and coordinate complex block-level efforts.

• Architect, design, simulate, layout, measure and productize CMOS-based analog/mixed-signal ICs.
• Lead a large block on complex chips, set deliverables, and mentor junior engineers.
• Participate in peer reviews and establish robust design methodology from concept to production.
• Collaborate with packaging, hardware, digital/DSP, system and module teams to meet signal and power integrity requirements.
• Work with validation and test teams to create lab test setups and debug silicon performance.
• Document designs, characterize over PVT, and support manufacturability and production handoff.

Requirements

Must-have technical experience and skills. Candidates are expected to have hands-on analog/mixed-signal IC design experience and strong problem-solving skills.

• Experience in design, simulation and measurement of high-speed ICs in at least three of the following areas:
  • High-speed serial links (serializers, deserializers, data converters)
  • Modeling for system link simulations
  • High-performance output drivers
  • High-performance phase-locked loops (PLLs)
  • Clock transmission and propagation
  • Op amps and programmable gain amplifiers
  • Equalization techniques
• Proven ability to take analog/MS blocks from concept through silicon bring-up and characterization.
• Experience collaborating across mixed teams (digital/DSP, packaging, system-level engineers).

Nice-to-have:

• Experience with electrical transceiver applications (backplane and cable communications).
• Experience with FinFET and GAA process technologies.
• High-frequency layout experience including floorplanning, passives (inductors, transformers), and transmission lines.
• Design-for-manufacturability skills: PVT characterization, electromigration, self-heating, IR drop analysis.
• Laboratory validation experience, ESD practices, and construction of test setups.
• Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulations, and MATLAB.

Education Requirements

Minimum degree and equivalent experience: Bachelor’s + 8 years related experience, Master’s + 6 years related experience, or PhD + 3 years related experience. No specific field of study was specified in the posting.

Additional Information

Short note: Cisco offers comprehensive benefits and compensation; the posted U.S./Canada starting salary range is $168,800 to $241,200 (base, excluding incentives and equity).

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).