Analog Mixed Signal Design Engineer

Job Title

Analog Mixed Signal Design Engineer

Role Summary

Join Intel's mixed-signal IP development team to design and verify analog and mixed-signal circuits with a focus on static timing analysis (STA) across analog-digital interfaces. The role works with analog designers, digital architects, and physical design teams to achieve timing closure and reliable silicon.

Experience Level

Mid-level. Typical requirement: 2+ years of relevant industry experience in mixed-signal verification or related engineering roles.

Responsibilities

Execute analysis, verification, and closure tasks across mixed-signal projects and improve verification methodology and automation.

• Lead static timing analysis (STA) for mixed-signal designs and drive timing closure across analog-digital interfaces.
• Develop and apply timing constraints and optimizations for complex mixed-signal systems.
• Set up simulations, develop testbenches, and perform schematic optimization and analog circuit verification using tools such as Cadence ADE.
• Perform comprehensive mixed-signal verification including analog simulations, behavioral modeling, and timing analysis; analyze results for power, performance, and reliability.
• Investigate, debug, and resolve complex issues in analog testbenches and mixed-signal simulations; perform root-cause analysis and corrective actions.
• Collaborate cross-functionally with analog designers, digital/RLT teams, architects, and physical design engineers to reach design goals.
• Develop behavioral models and improve verification flows; contribute to automation efforts using scripting and emerging AI tools.

Requirements

Key skills and experience required to be considered, followed by preferred skills.

• Must-have: 2+ years of experience in mixed-signal verification and driving methodology changes or initiatives.
• Must-have: 2+ years of scripting experience (e.g., Python) for automation.
• Nice-to-have: Experience with static timing analysis applied to analog/mixed-signal designs.
• Nice-to-have: Experience with Cadence ADE for simulation setup and testbench debugging.
• Nice-to-have: Experience with mixed-signal systems such as SerDes or PLLs, analog behavioral modeling (Verilog-A, SystemVerilog), and analog circuit design verification.
• Nice-to-have: Experience developing scripts and automation using AI techniques.
• Strong analytical and problem-solving skills and effective team communication and collaboration abilities.

Education Requirements

Minimum: Bachelor’s degree in Electrical Engineering, Computer Engineering, or a STEM-related field (or equivalent practical experience). Preferred: Post-graduate degree in Electrical or Computer Engineering or a STEM-related field. The posting notes that qualifications may be met via a combination of industry experience, internships, coursework, or research.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.