Analog Mixed-Signal Circuit Design Engineer

Job Title

Analog Mixed-Signal Circuit Design Engineer

Role Summary

Design analog and mixed-signal integrated circuits and contribute to the architecture and integration of on-chip voltage regulator products that use thin‑film magnetic inductors. Work with cross-functional teams (characterization, test, applications) to verify and bring designs into production.

Experience Level

Entry-level (early career). The role requires approximately 2+ years of relevant full‑custom CMOS design experience as noted in the minimum qualifications.

Responsibilities

Primary technical responsibilities include schematic- and post-layout design, verification, and cross-team integration.

• Design analog and mixed-signal circuits to meet architectural and technical specifications across CMOS nodes.
• Contribute to architectural definition and specification development for upcoming ICs with business and application teams.
• Research and evaluate new circuit techniques to improve IC performance.
• Perform analysis, design and verification simulations at schematic level and after post-layout extraction.
• Document block designs, present and participate in design reviews.
• Collaborate with Characterization, Test, and Application Engineers to verify, characterize, and debug owned circuit blocks.

Requirements

Must-have technical skills and tools required to perform the role; preferred items listed separately.

• Proven design skills in bandgaps, ADCs/DACs, PLLs/DLLs, LDOs, temperature sensors, switched-capacitor circuits, op-amps, comparators, and bias circuits.
• Experience with full-custom CMOS design flow, schematic-level and post-layout verification.
• Proficiency with Cadence Virtuoso (schematic and layout), Spectre, APS, and Calibre (DRC/LVS/PEX).
• Experience using Monte Carlo analysis and backend verification tools (EMIR, MOSFET voltage checks) is desirable.
• Ability to layout critical analog and mixed-signal circuits and debug silicon.
• Strong written and verbal communication; able to work in a fast-paced team environment.
• Preferred languages/tools: Verilog, Verilog-AMS, Python, Perl, Tcl, Cadence Skill, MATLAB.

Education Requirements

PhD or M.S.E.E. (MSEE) required; posting specifies PhD or MSEE plus approximately 2+ years of full-custom CMOS design experience. Equivalent practical experience was not explicitly offered as an alternative in the posting.

About the Company

Company: Efficient Computer

Headquarters: Austin, TX, USA

Developer of ultra-low-power general-purpose processors using patented technology that can consume up to 100x less energy than comparable ultra-low-power processors. Their programmable platform supports standard high-level languages and AI/ML frameworks to enable long-lived, battery-powered edge devices and energy-efficient SoCs for IoT and edge AI applications.