Analog Mask Design Engineer
NVIDIAJob Title
Analog Mask Design Engineer
Role Summary
Perform full-custom analog/mixed-signal mask-level layout and physical verification for advanced CMOS process nodes, optimizing for performance, area, and manufacturability. Work closely with circuit designers, verification, and tape-out teams to deliver production-quality silicon.
Position is based in Bengaluru with a hybrid work model.
Experience Level
Entry-level / Early Career — typically 2+ years of relevant analog layout experience.
Responsibilities
Key responsibilities include:
- Execute full-custom IC layout of analog/mixed-signal blocks (op-amps, bandgaps, ADCs, DACs, LDOs, voltage regulators) in advanced CMOS nodes.
- Perform and optimize physical verification tasks (DRC, LVS), density analysis, and comprehensive tape-out checks.
- Identify and resolve complex physical design issues; mentor junior engineers on layout methodologies.
- Drive optimization for performance, area, reliability, and manufacturability, including parasitic sensitivity analysis.
- Implement layout techniques such as common-centroid placement, matching, symmetry, shielding, dummy devices, and thermal-aware strategies.
- Contribute to floor planning, block-level routing, and macro assembly for multi-block designs.
- Collaborate across multi-functional and distributed teams; represent the layout team in technical discussions.
Requirements
Must-have and preferred skills:
- Must-have: 2+ years of high-performance analog layout experience in advanced CMOS processes.
- Must-have: Proficiency with industry-standard Cadence EDA tools for layout and verification.
- Must-have: Experience laying out high-performance analog blocks (current mirrors, sense amps, bandgaps, etc.) and shipping silicon to production.
- Must-have: Strong knowledge of analog layout guidelines (matching, symmetry, signal shielding, parasitics, EM considerations) and tape-out readiness checks.
- Must-have: Experience with floor planning, block routing, and macro-level assembly.
- Nice-to-have: Background with sub-micron design in foundry CMOS nodes (7nm finFET and below).
- Nice-to-have: Experience working in distributed design teams and mentoring junior engineers.
Education Requirements
BE (Bachelor of Engineering) or M.Tech in Electrical & Electronics or equivalent practical experience.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
