Analog Layout Senior Staff Engineer

Job Title

Analog Layout Senior Staff Engineer

Role Summary

Senior analog/mixed-signal layout engineer responsible for floorplanning, full-custom layout, verification, and tape-out of high-speed SerDes IPs and other analog blocks. Part of Marvell Central Engineering (AMS) team working across advanced FinFET and emerging process nodes to deliver production-ready analog IP for AI, cloud, storage, and networking products.

Experience Level

Senior — approximately 10+ years of experience in high-speed analog/custom layout development.

Responsibilities

Primary responsibilities include leading layout implementation, verification closure, automation, and mentoring within a small agile team.

• Lead layout development for high-speed SerDes IP and other analog circuits (ADC, PLL, bandgap, LDO) in advanced FinFET/GAA nodes.
• Translate schematics into full-custom layouts; own floorplanning through tape-out.
• Perform RC extraction and physical verification closure (DRC, LVS, ERC, DFM); resolve antenna violations.
• Conduct EMIR analysis and implement fixes for IR drop and electromigration.
• Drive layout reviews, mentor junior engineers, and promote best practices and process improvements.
• Develop automation and productivity scripts to streamline layout and verification flows.

Requirements

Must-have technical skills and experience; listed nice-to-have items where applicable.

• Extensive knowledge of semiconductor process technologies, device physics, and layout effects in advanced nodes.
• Proven experience in full-custom circuit layout, RC extraction, and physical verification (DRC, LVS, ERC, DFM) and EMIR analysis.
• Hands-on experience with mixed-signal/analog/high-speed layouts (SerDes, ADC/DAC, PLL, etc.).
• Proficiency with Cadence Virtuoso and industry-standard EDA tools.
• Familiarity with layout techniques: matching, shielding, clock routing, power planning, ESD, and latch-up mitigation.
• Ability to own the full development cycle and communicate effectively with global design teams.
• Nice-to-have: scripting/automation skills (Perl, Tcl, SKILL) and prior experience with emerging process nodes.

Education Requirements

BE/B.Tech or MS/M.Tech in Electrical/Electronics Engineering, Microelectronics, or related fields. The posting specifies about 10 years of relevant industry experience for this senior role.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.