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Analog IP Design Execution Manager

Intel Corporation
June 10, 2026
Full-time
Remote friendly (Phoenix, Arizona, United States)
Worldwide
$190,610 - $269,100 USD yearly
Semiconductor IP Jobs, Level - Senior

Job Title

Analog IP Design Execution Manager

Role Summary

Lead technical execution for analog and mixed-signal IP (high-speed serial IO and die-to-die interfaces) across design, validation, and product launch. Coordinate cross-functional teams and SOC partners to deliver IP releases on schedule with required content and quality.

On-site/hybrid role working with global partners to track program status, mitigate risks, and drive continuous improvement.

Experience Level

Senior β€” posting specifies 8+ years of experience and 5+ years managing technical execution for silicon projects.

Responsibilities

Manage integrated IP planning and delivery across the full lifecycle and across engineering domains.

  • Plan, coordinate, and deliver IP from partner engagement through pre-silicon, post-silicon validation, and launch.
  • Coordinate across architecture, analog, logic, validation, and SOC teams to meet schedules and content commitments.
  • Monitor program status and risks using data and metrics; recommend recovery actions and mitigate issues.
  • Identify technical problems and lead solution efforts leveraging prior design experience.
  • Communicate clearly to engineers, technical leaders, and executives; maintain stakeholder relationships.
  • Conduct retrospectives and drive continuous improvements in execution efficiency and product quality.
  • Develop team capabilities, model company values, and ensure a productive work environment.

Requirements

Key must-have and preferred qualifications (degree and field requirements summarized under Education Requirements).

  • Must-have: 8+ years relevant experience; 5+ years managing technical execution for silicon projects.
  • Must-have: Solid knowledge of analog design principles: noise, jitter, matching, stability, and linearity.
  • Must-have: Experience in analog IP development and delivery; proven experience with mixed-signal and high-speed serial IP in advanced process nodes.
  • Must-have: Solid understanding of the end-to-end silicon lifecycle from architecture through production qualification and release.
  • Nice-to-have: Hands-on experience in analog circuit design, mixed-signal logic and validation, and physical design.
  • Nice-to-have: Experience in silicon bring-up, post-silicon validation, and lab debug of analog circuits.
  • Nice-to-have: Deep knowledge of high-speed serial IO technologies (PCIe/CXL, USB) and die-to-die technologies (UCIe, BoW, HBM).
  • Nice-to-have: Familiarity with AI/ML-driven design productivity techniques and automation frameworks.
  • Must-have: Excellent communication, documentation, and presentation skills; demonstrated success leading large-scale cross-functional programs.

Education Requirements

Requires a Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field (posting specifies this with 8+ years experience). Master's degree in a related field is preferred. No certifications are listed and equivalent-experience language is not explicitly stated.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-06-10