Analog Design Staff Engineer

Job Title

Analog Design Staff Engineer

Role Summary

Staff-level analog/mixed-signal engineer responsible for architecting and delivering multi-Gbps SERDES IP for advanced FinFET and next-generation process nodes. Work within an analog R&D team to produce silicon-ready designs, collaborate with digital and layout teams, and support post-silicon bring-up.

Experience Level

Senior (staff-level). The role expects an experienced analog designer with substantial leadership in high-speed IC design; the posting describes engineers with over a decade of domain experience.

Responsibilities

Design, specify, and validate high-speed transceivers and lead technical decisions across the analog chain.

• Translate standards (PCIe, Ethernet, USB, CXL) into transceiver architectures and detailed sub-block specifications for NRZ and PAM4 multi-Gbps designs.
• Architect and design analog/mixed-signal blocks: TX drivers, RX front-ends, adaptive equalizers, PLLs/DLLs, bandgaps, regulators, oscillators, ADC/DACs.
• Collaborate with digital teams on co-design, calibration/adaptation algorithms, and timing handoff for seamless integration.
• Work directly with layout engineers to minimize parasitics, manage device stress and process variation, and ensure robust post-silicon performance.
• Present simulation results and design trade-offs in reviews and customer meetings; document design features, test plans, and characterization results.
• Support post-silicon bring-up, debug using electrical analysis, and drive design updates based on customer silicon and field data.

Requirements

Key technical skills and hands-on experience required for successful performance in the role.

• Proven CMOS tape-out experience in FinFET process nodes with demonstrable multi-Gbps high-speed design work.
• Deep expertise in SERDES sub-circuits (TX, RX, adaptive equalizers, PLLs/DLLs, references, regulators, ADC/DAC).
• Strong analog/digital co-design experience, including calibration loops and timing handoff.
• Proficiency with SPICE simulators (Spectre, HSPICE, or similar) and design verification flows.
• Experience collaborating on schematic entry and physical layout; ability to minimize parasitics and guide implementation trade-offs.
• Familiarity with system-level budgeting for jitter, amplitude, and noise; understanding of signal integrity, packaging parasitics, crosstalk, and channel loss.
• Experience with scripting for data post-processing and automation (TCL, PERL, MATLAB, or similar).
• Hands-on post-silicon analysis and debug experience to drive follow-up design changes.
• Nice-to-have: experience with ESD protection, custom digital design, and design-for-reliability topics (electromigration, IR drop, aging, self-heating).

Education Requirements

MTech/MS with 4+ years or BTech/BS with 5+ years of hands-on analog IC design experience in Electrical Engineering, Computer Engineering, or a related technical field (as stated in the posting).

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.