Analog Design Staff Engineer

Job Title

Analog Design Staff Engineer

Role Summary

Design high-performance standard cells and sequential logic for Synopsys IP libraries. Deliver manufacturable, low-leakage, and high-speed circuits validated through simulation, post-layout extraction, and characterization.

Experience Level

Senior — 5 to 8 years of hands-on standard cell circuit design experience.

Responsibilities

Primary responsibilities include cell circuit design, post-layout validation, optimization for PPA, and automation of verification flows.

• Design and develop flip flops, latches, multibit flip flops, voltage level shifters, power switches, clock buffers, and complex sequential cells.
• Build and refine post-layout extraction and parasitic-aware simulation environments to validate circuit performance.
• Optimize digital and analog topologies for power, performance, and area across process nodes and operating corners.
• Perform statistical and variation analysis (Monte Carlo and corner-based) to ensure robustness across manufacturing spread.
• Apply CMOS device physics, latch-up prevention, and electromigration constraints to ensure manufacturability and reliability.
• Collaborate with layout engineers to close timing, power, and area targets while preserving design intent.
• Automate repetitive design and analysis tasks using Python, shell scripting, or ICV to improve team efficiency.

Requirements

Must-have technical experience and skills, plus several desirable additions.

• 5–8 years of hands-on experience in standard cell circuit design focused on flip flops, latches, multibit flip flops, level shifters, power cells, and clock cells.
• Proven experience developing post-layout extraction environments and validating circuit performance with parasitic-aware simulations.
• Strong understanding of CMOS device characteristics, design rules, latch-up mechanisms, and electromigration constraints.
• Solid background in digital circuit design and PPA (power, performance, area) optimization techniques.
• Experience with statistical and variation analysis across process, voltage, and temperature corners.

Nice-to-have:

• Familiarity with Python, shell scripting, or ICV for design automation.
• Knowledge of standard cell layout principles and physical design considerations.
• Hands-on experience with SPICE-based simulation and post-layout verification tools.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.