Analog Design Manager

Job Title

Analog Design Manager

Role Summary

Lead a small analog/mixed-signal design team responsible for high-speed Multi-Gbps NRZ and PAM4 SerDes PHY IP. The role combines hands-on transistor-level design with team leadership to deliver high-performance, reliable silicon for networking, data center, and AI applications.

You'll work within the Interface IP group in Mississauga, ON, collaborating with digital, layout, verification, and product teams to define architectures, drive implementation, and support post-silicon characterization.

Experience Level

Senior - managerial and technical leadership role. Candidates are expected to have substantial analog/mixed-signal experience and several years leading design efforts and people (see Education Requirements for degree-linked experience guidance).

Responsibilities

Lead and deliver analog SerDes sub-systems from spec to silicon while managing and mentoring a small team.

• Provide hands-on technical leadership for a major analog block, from specification through design review and silicon delivery.
• Define transceiver architectures and analog sub-block specifications for high-speed NRZ and PAM4 IP.
• Manage and mentor a small team of analog designers; lead hiring and career development.
• Collaborate with digital and layout teams to optimize co-design, floorplans, and physical implementation.
• Specify and execute design and verification strategies using industry-standard simulation tools.
• Support electrical characterization, analyze customer silicon data, and drive post-silicon improvements.
• Document design features, test plans, and results; present tradeoffs to stakeholders and customers.
• Develop automation and tools to improve team productivity and quality.

Requirements

Core technical and management qualifications required for this role.

• Minimum 2+ years of people management experience: hiring, developing employees, and setting priorities under deadlines.
• Strong background in circuit and system modeling, analog design, DSP, and communications theory.
• Proven experience with Multi-Gbps SerDes architectures and sub-blocks (TX, RX, equalizers, samplers, drivers, SERDES, PLLs/DLLs, regulators, ADCs/DACs).
• Experience with analog/digital co-design, calibration/adaptation techniques, and timing handoff.
• Familiarity with reliability concerns (ESD, EM, IR, aging, self-heating) and custom high-speed digital logic.
• Proficiency in schematic entry, physical layout collaboration, SPICE simulation, and Verilog-A modeling.
• Deep understanding of jitter, noise, signal integrity, parasitics, and crosstalk mitigation.
• Excellent communication, documentation, problem-solving, and attention-to-detail skills.

Education Requirements

Required: M.A.Sc. with 8+ years of relevant analog/mixed-signal IC design experience, or PhD with 6+ years of relevant analog/mixed-signal IC design experience (these degree-and-experience combinations are stated requirements in the source posting).

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.