Analog Design Engineering Manager

Job Title

Analog Design Engineering Manager

Role Summary

Lead a US-based analog design team within Intel's Hard IP and Test Chip Development organization to deliver analog and mixed-signal IP for client, datacenter, AI and foundry products. The role focuses on technical leadership, project execution, and people development across high-speed serial IO and die-to-die interface IPs.

The manager will lead a team of ~10–15 direct reports, collaborate with global peer teams, and is expected to be on-site at least four days per week (primary locations: Phoenix, AZ; additional location: Hillsboro, OR).

Experience Level

Senior — requires substantial experience (typical guideline: 12+ years technical experience with 8+ years in management or leadership roles).

Responsibilities

Accountable for delivering analog IP from planning through silicon validation and productization. Key responsibilities include:

• Provide technical leadership for analog circuit design (ADC/DAC, phase interpolators, voltage regulators, etc.) and ensure silicon quality across pre- and post-silicon phases.
• Define and execute project plans: schedule management, resource allocation, risk mitigation, and tracking milestones to meet IP and SOC TI deadlines.
• Hire, mentor, and develop a cross-functional team of analog engineers; grow capabilities and provide feedback for both direct and matrixed team members.
• Drive process and efficiency improvements, including adoption of automation and AI-assisted design/verification tools.
• Coordinate closely with architecture, logic, physical design, SOC teams, and post-silicon validation groups to resolve integration and validation issues.
• Foster a productive engineering culture, model company values, and represent technical progress to stakeholders and leadership.
• Work on-site (expected ≥4 days/week) and collaborate with teams located in the US and globally.

Requirements

Must-have technical and leadership qualifications (deducted from posting; education details are under Education Requirements):

• 12+ years of relevant industry experience in analog/mixed-signal development.
• 8+ years in a management or leadership role with responsibility for engineering teams.
• Proven track record delivering analog IP from concept to production.
• Strong foundation in analog design principles: noise, jitter, matching, stability, and linearity.
• Experience with silicon bring-up, post-silicon validation, and lab debug of analog circuits.
• Excellent written and verbal communication, documentation, and presentation skills for technical and executive audiences.

Nice-to-have:

• Hands-on design experience with PLL, CDR, CTLE, DFE, ADC, transmitter or receiver design.
• Deep knowledge of high-speed serial IO and die-to-die standards (examples noted: PCIe/CXL, USB Type-C, UCIe).
• Proven success building and scaling silicon teams for complex, high-impact programs.

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related technical field (posting specifies Bachelor's + 12+ years experience). Preferred: Master's or PhD in Electrical/Electronics Engineering or related field. The posting accepts related technical disciplines; no explicit mention of "or equivalent experience" was provided.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.