Analog Design Engineer

Job Title

Analog Design Engineer

Role Summary

Design analog building blocks for high-performance SERDES, DDR and memory IP used in production silicon. Work on circuit topology, simulation, reliability and close collaboration with layout and product teams to deliver robust IP.

This role is on an analog IP team focused on shipping reusable blocks that meet power, area, performance, and reliability targets for customer SoCs.

Experience Level

Mid-level. No specific years of experience stated.

Responsibilities

Primary responsibilities include designing analog circuits, verifying them across corners, and ensuring manufacturability and reliability through collaboration and methodology improvements.

• Design and develop analog building blocks for SERDES, DDR, and memory IP (PLLs, bandgaps, regulators, comparators, bias circuits).
• Run simulations across process, voltage, and temperature corners to verify performance, reliability, and margin against spec.
• Identify and refine circuit topologies to meet power, area, and performance targets while preserving robustness.
• Work directly with layout engineers to account for matching, proximity effects, parasitics, electromigration, IR drop, and aging.
• Participate in and conduct design reviews; defend design choices and incorporate feedback from senior engineers and product teams.
• Improve design methodologies and flows, update simulation/checklist practices, and document lessons learned from tapeouts.

Requirements

Must-have technical skills and experience; plus a few desirable qualifications.

• Must-have: Hands-on experience designing analog circuits for SERDES, DDR, memory, or similar high-speed/mixed-signal applications.
• Must-have: Proficiency with industry CAD tools for schematic capture and simulation such as Cadence Virtuoso, HSPICE, Spectre, or equivalents.
• Must-have: Solid understanding of design-for-reliability constraints including electromigration, IR drop, and aging effects.
• Must-have: Knowledge of layout effects (matching, proximity, parasitic extraction) and experience collaborating closely with layout engineers or performing layout.
• Must-have: Strong problem-solving and debugging skills for simulation, layout, and implementation issues.
• Nice-to-have: Experience with FinFET or Gate-All-Around process technologies.
• Nice-to-have: Prior work on analog IP that shipped in production or was reused across customer chips.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or a related technical field is specified.

Synopsys Canada provides accommodation in the recruitment process; contact hr-help-canada@synopsys.com for assistance if required.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.