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Analog Design Architect

Synopsys
November 2, 2026
Full-time
On-site
Boxborough, Massachusetts, United States
$198,000 - $297,000 USD yearly
Device Engineering Jobs, Level - Senior

Job Title

Analog Design Architect

Role Summary

Lead analog/mixed-signal architect on the High Bandwidth Memory (HBM) PHY team responsible for defining architecture, ensuring silicon-to-simulation correlation, and supporting customer bring-up. Work across layout, digital, verification, and product teams to deliver production-ready PHY IP for AI and high-performance computing systems.

Experience Level

Senior - typically 12+ years of hands-on experience designing analog and mixed-signal circuits for memory interfaces or high-speed die-to-die links.

Responsibilities

Key day-to-day responsibilities include architecture, silicon correlation, and customer debug support.

  • Drive silicon-to-simulation correlation for HBM PHY test chips; identify root causes when measurements diverge from models and feed findings back into design methodology.
  • Support customer silicon bring-up and debug; diagnose signal integrity, power integrity, and functional issues in real deployments.
  • Define architecture for next-generation HBM PHY products, balancing power, performance, area, and complexity for manufacturable silicon.
  • Design and validate analog and mixed-signal blocks such as PLLs, DLLs, drivers, receivers, and voltage regulators.
  • Collaborate with layout engineers to preserve circuit performance through physical implementation; review floorplan, routing, and parasitic extraction.
  • Work with cross-functional, multi-site teams (digital, verification, product) to deliver integrated PHY IP on aggressive schedules.
  • Mentor mid-level and junior analog designers; review schematics and share debug techniques.

Requirements

Must-have technical skills and demonstrated hands-on experience.

  • 12+ years of hands-on experience designing analog and mixed-signal circuits for memory interfaces or high-speed die-to-die links.
  • Proven track record debugging silicon for memory interfaces, including root-cause analysis of signal integrity, power integrity, and functional failures.
  • Deep practical understanding of layout parasitics, substrate coupling, and power delivery and experience guiding physical implementation reviews.
  • Strong grounding in signal integrity and power integrity concepts (transmission line effects, termination schemes, crosstalk, simultaneous switching noise).
  • Experience defining or contributing to PHY architecture and making PPA trade-offs that hold up in silicon.
  • Ability to communicate complex trade-offs concisely to product managers, customers, and cross-functional teams.
  • Nice-to-have: scripting experience in Python, Perl, or similar for design automation, analysis, or post-processing; exposure to AI-assisted design flows.

Education Requirements

MS or PhD in Electrical Engineering with a focus on analog, mixed-signal, or RF circuit design.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-29