Analog Circuit Design Engineer

Job Title

Analog Circuit Design Engineer

Role Summary

Design and develop analog and mixed-signal circuits (especially PLLs, oscillators, and clocking circuits) for advanced process nodes and analog IP. Collaborate with architecture, layout, and verification teams to meet power, performance, area, timing, and yield targets for high-performance semiconductor products.

Position is based in Bangalore with a hybrid work model.

Experience Level

Senior — preferred 8–16 years of relevant circuit design experience; listed as Experienced Hire.

Responsibilities

Contribute to end-to-end analog/mixed-signal design, verification, and optimization.

• Design and implement PLLs, clocking circuits, LC VCOs/DCOs and related oscillator subsystems.
• Extract chip parameters, develop test plans, and verify designs against microarchitecture specifications.
• Optimize circuits for power, performance, area, timing, and leakage while meeting product requirements.
• Work with architecture and layout teams to ensure electrical robustness and manufacturability.
• Participate in inductor/custom passive design and characterize components using 3D solver tools where applicable.
• Perform transistor-level simulation and post-layout verification; support DRC/LVS and extraction flows through collaboration with layout and verification teams.
• Design and analyze high-speed digital interfaces and contribute to timing closure flows when required.
• Implement and validate control systems, biasing, bandgap references, op-amps, LDOs, and feedback/compensation techniques.

Requirements

Must-have technical skills and tools; preferred items noted.

• Demonstrated analog and mixed-signal design experience with emphasis on PLLs and clocking circuits (must).
• Strong fundamentals in CMOS circuit design, passive RC, and switched-cap circuits (must).
• Experience with LC VCO/DCO design and oscillator performance parameters (must).
• Proficiency with transistor-level circuit simulation tools such as SPICE (must).
• Experience with custom design environments and tools (e.g., Cadence Virtuoso, Analog Artist) and post-layout extraction flows (must).
• Familiarity with PLL variants (charge-pump, ADPLL, Fractional-N, spread-spectrum) and charge-pump/ADPLL architectures (must).
• High-speed digital circuit design and timing/flow closure experience (must).
• Nice-to-have: experience in inductor custom design and use of 3D solver tools; familiarity with DRC/LVS; prior work on foundry/process interactions.
• Nice-to-have: 8–16 years of circuit design experience and 2–6 years specific to LC oscillators/inductor design (preferred, not required).

Education Requirements

Candidate should have at least a Bachelor’s or Master’s degree (B.S./M.S.) in Electrical Engineering or equivalent; strong academic background in CMOS semiconductor device physics, silicon processing, and relevant coursework in digital, analog, and I/O circuit design. Equivalent practical experience is acceptable.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.