Algorithm Engineer, Senior/Staff

Job Title

Algorithm Engineer, Senior/Staff

Role Summary

Develop and evaluate algorithms, build system-level models, and analyze link performance for advanced wired communication and connectivity products. Work within the ASICS Engineering group, focusing on system-level simulation and performance analysis of wired communication chips.

Experience Level

Senior. Qualifications specify experience expectations that vary by degree: typically 2–4+ years of relevant ASIC or related work (see Education Requirements for degree-specific guidance).

Responsibilities

Primary technical responsibilities include algorithm development, system modeling, and cross-domain collaboration to improve link/system performance.

• Develop and evaluate LDPC decoding algorithms and related signal-processing techniques.
• Build system-level simulation models using C++ and MATLAB.
• Analyze link performance, identify bottlenecks, and propose algorithmic or architectural improvements.
• Work across digital and analog domains to understand system-level interactions and implementation trade-offs.
• Collaborate with architecture, digital design, analog, validation, and software teams.
• Support algorithm implementation, debugging, and performance optimization.

Requirements

Must-have technical skills and relevant experience.

• Strong knowledge of digital signal processing and communication systems.
• Hands-on experience with LDPC coding and decoding algorithms.
• Proficiency in C++ and MATLAB for algorithm development and system simulation.
• Basic understanding of analog signal processing and mixed-signal systems.
• Experience in ASIC design, verification, validation, integration, or closely related work (see Education Requirements for years-of-experience guidance).
• Good analytical, problem-solving, and communication skills.

Preferred / nice-to-have:

• Experience with Ethernet PHY, SerDes, or other high-speed wired communication systems.
• Experience with link-level or system-level modeling, including channel models, equalization, noise, and interference.
• Familiarity with FEC architectures, fixed-point implementation, or hardware-oriented algorithm development.

Education Requirements

Degree in Science, Engineering, or a related field. Examples called out: Bachelor's, Master's, or PhD in Electrical Engineering, Communications Engineering, Computer Engineering, or related technical fields. Experience expectations tied to degree: Bachelor's +4 years of relevant ASIC/design/verification/validation/integration experience; Master's +3 years; PhD +2 years.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.