AI/ML Software Engineer (2026 New College Graduate)

Job Title

AI/ML Software Engineer (2026 New College Graduate)

Role Summary

Individual-contributor engineering role focused on workload-driven architecture for AI/ML systems across hardware and software boundaries. The engineer will measure and model real workloads, inform SoC and memory-subsystem design, and define software metrics and frameworks used for HW/SW co-optimization.

The role involves cross-functional collaboration with hardware (CPU, SoC, memory, interconnect) and software (compilers, runtimes, ML frameworks) teams and reporting findings to senior engineering and product stakeholders.

Experience Level

Entry-level — new college graduate. Suitable for candidates just completing a BS or MS and early-career engineers.

Responsibilities

Primary responsibilities focus on workload analysis, measurement infrastructure, and cross-domain architecture recommendations.

• Characterize AI/ML workloads and perform hardware performance analysis to determine system-level KPIs.
• Define and implement software measurement frameworks and methodologies for product portfolio evaluation and pre-silicon estimation.
• Build and validate tooling and integrations (e.g., MLIR, IREE) to measure and project performance on MIPS products.
• Identify bottlenecks (compute, DRAM bandwidth, on-chip memory, data movement, software overhead) and recommend architectural or optimization changes.
• Represent software requirements in architectural discussions with hardware and software teams; produce concise recommendations and detailed technical reports for leadership.
• Adhere to Environmental, Health, Safety & Security requirements in all activities.

Requirements

Must-have technical skills and eligibility requirements; preferred items listed separately.

• Practical knowledge of CPU and SoC architecture: memory hierarchies, out-of-order execution, vector/SIMD pipelines, and power management; ability to reason quantitatively about memory-bound vs. compute-bound workloads.
• Experience or strong familiarity with AI/ML acceleration on edge devices (NPUs, inference accelerators, DSP pipelines) and HW/SW co-design tradeoffs.
• Familiarity with AI compiler infrastructure (MLIR, IREE, TVM, TFLite) and how graph representations are transformed and lowered to hardware.
• Proven ability to collaborate across functions, write clearly, and present technical findings to varied audiences.
• English fluency (written and verbal) and willingness to travel up to 10%.
• US work authorization required; role is 100% in-office at one of the company locations (Dallas, Austin, or San Jose).

Education Requirements

BS required or MS preferred in Electrical Engineering, Computer Engineering, Computer Science, or a closely related technical field — or equivalent practical experience.

Preferred Qualifications

Nice-to-have experience that strengthens candidacy.

• Knowledge of CPU vector/matrix extensions (AVX, NEON, RVV, AMX, SME) and other hardware features.
• Experience translating workload analysis into SoC architecture requirements.
• Contributions to graph lowering or compiler toolchains (MLIR, IREE) or prior contributions to relevant open-source projects.
• Internal/external publications or participation in technical standards work.
• Familiarity with RISC-V architecture and its vector/matrix extensions.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.