AI/ML-driven ASIC Design and Implementation Lead Engineer

Job Title

AI/ML-driven ASIC Design and Implementation Lead Engineer

Role Summary

Lead development and prototyping of AI/ML-driven automation and CAD tool techniques to improve power, performance, area, and verification for SoC and IP development. Collaborate with architecture, IP design, SoC implementation, verification, and design enablement teams to evaluate state-of-the-art AI/ML approaches for VLSI flows.

The role focuses on researching and delivering prototype solutions (GenAI, reinforcement learning, graph neural networks, convolutional networks) and piloting them on real designs for advanced-node SoCs, with the goal of improving automation and design quality.

Experience Level

Senior level — requires 6+ years of professional software/engineering experience in complex software projects and tool development.

Responsibilities

Work on R&D and hands-on implementation projects to integrate AI/ML methods into VLSI CAD and implementation flows.

• Research and prototype AI/ML techniques for CAD problems (GenAI, RL, GNNs, CNNs).
• Collaborate with academic partners and internal architecture, IP, verification, and implementation teams to evaluate solutions.
• Develop prototype tools, features, and flows to improve PPA (power, performance, area) and verification quality.
• Pilot new automation on real SoC/IP designs and iterate based on results.
• Define method and tool requirements for adoption across multiple sites and teams.
• Work in fast-paced advanced-node technology projects and drive continuous improvements to design flows.

Requirements

Must-have technical skills and experience for immediate contribution; desirable items are listed separately.

• 6+ years developing complex software projects.
• Proficient in Python and C++ for tool and prototype development.
• Hands-on experience with Unix/Linux development environments and common revision control (Git, BitBucket).
• Experience with software development and debug tools, CI/CD concepts (Jenkins, LSF or similar).
• Strong analytical problem-solving skills and effective verbal/written communication.

Desirable / nice-to-have:

• Experience in VLSI CAD methodology and tool development or EDA tool usage for design, verification, DFT, and implementation.
• Knowledge of design constraints and implementation topics: SDC, clocks, CDC, RDC, static timing analysis, low-power flows (UPF).
• Background in algorithms and optimization for data structures and software used in optimization problems.
• Familiarity with design revision control tools (DesignSync), Splunk, Jenkins, LSF and established CI/CD processes.

Education Requirements

BS or MS in Computer Science, Electrical Engineering, Computer Engineering, or related disciplines.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.