AI/ML driven ASIC Design and Implementation Automation Engineer

Job Title

AI/ML driven ASIC Design and Implementation Automation Engineer

Role Summary

Join the Advanced Chip Engineering (ACE) Design Methodologies and Automation team to research, prototype, and deploy AI/ML solutions that improve ASIC/SoC implementation quality (power, performance, area) and engineering productivity. Work across architecture, IP, front-end and implementation teams to pilot and integrate AI/ML-driven CAD automation for advanced-node SoCs and microcontrollers.

Experience Level

Mid-level — the posting requests 5+ years of relevant experience in AI/ML applied to optimization problems and software/CAD development.

Responsibilities

Deliver prototypes and automation that apply AI/ML techniques to VLSI design and implementation; coordinate with internal teams and external research partners.

• Research and evaluate state-of-the-art AI/ML methods (GenAI, reinforcement learning, GNNs, CNNs) for VLSI/CAD applications.
• Develop prototype tools and automation to apply selected techniques to real SoC/IP designs.
• Integrate and pilot prototypes with architecture, IP, verification and implementation teams across sites.
• Analyze results and define requirements for production CAD tool features and flows.
• Collaborate with academic and industry researchers to transfer methods into engineering practice.
• Document designs, participate in design reviews, and present findings to cross-functional stakeholders.

Requirements

Core technical skills and hands-on engineering experience required; desirable VLSI/CAD domain skills listed separately.

• Must-have:
  • Strong AI/ML expertise and practical experience applying models to optimization problems (LLMs, CNN, RNN, GraphNN).
  • Proficiency in Python and C++ for prototype and tool development.
  • Data structures, algorithms, and software development experience focused on optimization.
  • Experience with Unix/Linux, Git/BitBucket, build systems, and debugging tools.
  • Excellent analytical problem-solving and clear verbal/written communication skills.
• Nice-to-have:
  • Experience with VLSI CAD methodology and EDA tool development.
  • Familiarity with static timing analysis, constraints (SDC, clocks, CDC), low-power flows (UPF), and placement/routing concepts.
  • Knowledge of HDL (SystemVerilog, Verilog, VHDL) and physical design/implementation flows.
  • Experience with CI/CD tools (Jenkins), job schedulers (LSF), Splunk, Design revision control (DesignSync), and Make.

Education Requirements

BS or MS in Computer Science, Electrical Engineering, Computer Engineering, or a related technical discipline (as stated in the posting).

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.