3DIC Interface ECO Optimization Internship
This internship supports development and evaluation of engineering-change-order (ECO) optimization for 3DIC interface designs. The intern will work with hardware/R&D engineers to run ECO flows, validate changes, and help automate parts of the ECO process.
Work is onsite in Hsinchu, Taiwan; the role is hands-on and focused on practical implementation and verification tasks.
Entry-level (Internship) β suitable for current students or recent graduates seeking practical experience in IC design flows.
Primary responsibilities include:
Minimum and preferred skills:
Not specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
