Job Title
VLSI Physical Design Engineer
Role Summary
Execute backend VLSI physical-design tasks for Hailo's AI processors, contributing to tape-out and signoff of production chips. The role works within the VLSI team (posting references the group in Tel Aviv) and interfaces with RTL, architecture and CAD teams.
Focus on implementing and optimizing physical flows to meet power, performance, and area targets for edge AI products.
Experience Level
Mid-level β typically requires about 3+ years of VLSI physical design experience.
Responsibilities
Key responsibilities include:
- Perform all phases of physical design: synthesis, place-and-route, clocking, timing closure, and signoff.
- Develop, maintain and improve backend (BE) flows and automation for rtl-to-gds flows.
- Apply STA and PPA optimization methods to meet performance and power targets.
- Integrate signoff verification flows and CAD toolchains to achieve silicon-quality results.
- Collaborate with RTL designers, architects, and CAD engineers to support tape-outs.
Requirements
Required skills and practical experience:
- Minimum 3 years experience as a VLSI physical design engineer.
- Experience with advanced process nodes.
- Deep understanding of physical design: synthesis, implementation, STA, and PPA optimization methods.
- Hands-on experience with CAD tools, rtl-to-gds flows, and signoff verification flows.
- Strong scripting and flow-development capability.
- Nice-to-have: experience developing BE flows and scripts; low-power design experience.
Education Requirements
B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related technical field from a leading university.
About the Company
Company: Hailo
Headquarters: Tel Aviv, Israel
Hailo develops high-performance AI processors and software for edge devices, enabling efficient on-device neural network inference across industries such as automotive, smart cities, manufacturing, agriculture, and retail.

Date Posted: 2026-07-02