Verification IP Engineer

Role Overview

The Verification IP Engineer role at Siemens involves the development of comprehensive verification IPs for high-speed interfaces. The position is hybrid based in Noida, and requires interaction with design teams to enhance products through effective verification methodologies.

Experience Level

The ideal candidate should have 5 to 8 years of experience in verification engineering, with a strong background in electronics engineering.

Key Responsibilities

Your primary responsibilities will include:

• Specifying, implementing, and testing verification components for various applications.
• Working with System Verilog and methodologies such as UVM to improve verification processes.
• Collaborating with technical marketing engineers and field application engineers to address customer requirements and resolve issues.
• Ensuring effective debugging and logging of verification processes.

Qualifications

The position requires candidates to have a B.Tech/M.Tech in Electronics Engineering or related fields from reputable institutes. Applicants should possess:

• Proven expertise in verification engineering and hands-on experience with standard bus protocols such as PCIe and USB.
• Strong knowledge of System Verilog for creating test benches.
• A collaborative mindset, interested in learning and building expertise in new areas.

Education Requirements

A degree in Electronics Engineering (B.Tech/M.Tech) is required.