Verification Engineer

Job Title

Verification Engineer

Role Summary

Responsible for system-level and RTL verification of ASIC and FPGA designs: build verification environments, execute coverage-driven plans, and drive verification to closure in collaboration with RTL designers.

Position is on an engineering team focused on high-performance AI data center hardware based in Silicon Valley.

Experience Level

Senior - 7+ years of digital design verification experience.

Responsibilities

Primary duties include planning and executing verification to ensure correctness and quality of digital designs.

• Develop, implement, and maintain RTL verification environments using UVM or equivalent methodologies.
• Create and execute coverage-driven verification plans aligned with design specifications.
• Develop directed and constrained-random test cases and sequences to validate functionality and exercise corner cases.
• Analyze simulation results, debug verification and design issues, and perform root-cause analysis with RTL designers.
• Implement and track functional and code coverage, driving verification to closure.
• Develop reusable verification components and write SystemVerilog Assertions (SVA).
• Participate in design and verification reviews; provide input on testability and correctness.
• Automate regression testing and improve verification infrastructure using Python and scripting.
• Contribute to continuous improvement of verification processes, tools, and methodologies.

Requirements

Must-have technical skills and experience.

• 7+ years of experience in digital design verification.
• Strong hands-on experience with UVM-based or similar verification methodologies.
• Proficiency in SystemVerilog and Python.
• Experience with industry-standard EDA tools (e.g., Synopsys VCS, Siemens/Mentor Questa, Cadence Xcelium).
• Solid understanding of digital design fundamentals.
• Experience verifying standard bus and interconnect protocols such as AXI, AXI-Stream, and APB.
• Experience with high-speed communication protocols (PCIe, Ethernet 10G/40G/100G, SPI, I2C).
• Strong analytical and problem-solving skills; attention to detail.
• Clear written and verbal communication for cross-functional collaboration; ability to work independently.

Nice-to-have:

• Experience with formal verification techniques and tools.
• Experience verifying processor subsystems or SoC-level designs.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Delos Data

Headquarters: Palo Alto, CA, United States

Stealth-mode Silicon Valley startup building foundational technology to improve performance, scalability, and resiliency of large-scale AI data center clusters. Backed by venture capital and led by experienced founders, the company develops hardware/software solutions and operates across U.S. and Canadian locations.