Various Engineering Roles — Reading, United Kingdom

Job Title

Various Engineering Roles — Reading, United Kingdom

Role Summary

Multiple engineering openings based in Reading (with some roles eligible for off-site work). Positions cover ASIC Digital Design, ASIC Verification, ASIC Physical Design and related hardware engineering disciplines across senior through principal and director levels.

Teams work on digital/analog IP and SoC engineering: designing, verifying, and delivering silicon-focused solutions and collaborating with cross-functional stakeholders to meet product and schedule goals.

Experience Level

Senior-level (roles mainly at Senior, Principal, and Director levels). Typical hires expect several years of hands-on ASIC/hardware experience; many roles target candidates with substantial domain experience (often 7+ years).

Responsibilities

Typical responsibilities vary by role; common responsibilities include:

• Architect, design, or verify ASIC digital/analog blocks and IP for SoC integration.
• Develop and run verification plans and testbenches (simulation, UVM, formal where applicable).
• Perform synthesis, timing closure, floorplanning, and physical design reviews with EDA tools and flows.
• Collaborate with system architects, firmware, layout, and software teams to drive delivery and debug silicon issues.
• Mentor and lead engineering teams, provide technical direction, and drive design reviews.
• Create and maintain documentation, design specifications, and verification collateral.

Requirements

Core requirements differ by position; common must-have and nice-to-have items are:

• Must-have: Strong ASIC/hardware engineering experience (digital design, verification, or physical design) with practical experience in RTL, timing, and standard EDA flows.
• Must-have: Proficiency with hardware description languages (Verilog/SystemVerilog) and common verification methodologies and tools.
• Must-have: Experience with synthesis, static timing analysis, and/or place-and-route flows for production silicon.
• Nice-to-have: Experience with IP development, SoC integration, power/performance analysis, scripting (Python, Tcl), and familiarity with formal or emulation platforms.
• Nice-to-have: Proven leadership or technical lead experience on complex chip projects.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.