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Validation / Verification Engineer, Staff Engineer

Synopsys
October 20, 2026
Full-time
On-site
Ottawa, Ontario, Canada
Test Engineering Jobs, Level - Senior

Job Title

Validation / Verification Engineer, Staff Engineer

Role Summary

Staff-level hardware engineer responsible for laboratory validation of Synopsys memory interface IP. Work includes PCB design and layout for characterization, signal integrity analysis, hardware debugging, and collaboration with silicon and firmware teams to close the loop between simulation and measured performance.

The role is based in a Nepean laboratory and supports development of reference boards and validation infrastructure used by automotive, mobile, and data center customers.

Experience Level

Senior (Staff) - typically 6–8+ years of hands-on hardware design and validation experience with high-speed digital and mixed-signal systems.

Responsibilities

Key responsibilities include lab-based design, analysis, and debugging to validate memory interface IP and provide reference designs for customers.

  • Design and layout PCBs using Cadence Allegro for IP characterization and customer reference implementations.
  • Perform signal integrity analysis using S-parameters, eye diagrams, and crosstalk simulations for multi-gigabit interfaces.
  • Debug hardware using logic analyzers, oscilloscopes, vector network analyzers, spectrum analyzers, and protocol analyzers.
  • Conduct cross-functional design reviews to set routing, power distribution, and constraint best practices.
  • Execute root cause analysis on validation failures to identify silicon, board design, firmware, or environmental causes.
  • Produce reference board designs and validation reports that inform silicon teams and accelerate customer integration.

Requirements

Must-have technical skills and experience. Nice-to-have items noted where applicable.

  • 6–8+ years of hardware design and validation experience focused on high-speed digital and mixed-signal systems.
  • Expert proficiency in Cadence Allegro for schematic capture, PCB layout, and constraint-driven design.
  • Strong understanding of signal integrity: S-parameters, impedance control, crosstalk, intersymbol interference, and return loss.
  • Proven experience debugging across silicon, firmware, board design, and test setup using lab instrumentation.
  • Working knowledge of communication and debug interfaces such as JTAG, I2C, SPI, and UART, including routing and protocol diagnostics.
  • Ability to manage complex technical problems independently and communicate clear, data-driven findings to cross-functional teams.
  • Experience mentoring junior engineers and contributing to technical design reviews (nice-to-have).

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Electronics Engineering, or equivalent professional experience.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-15