UVM SystemVerilog Verification Engineer

Job Title

UVM SystemVerilog Verification Engineer

Role Summary

Work on verification of AirSpan's FPGA and ASIC digital designs using Universal Verification Methodology (UVM) and SystemVerilog. Collaborate with design and development teams to develop test plans, create testbenches, run simulations, debug failures, and report defects.

The role supports validation of 4G/5G radio and baseband components and requires close interaction with hardware and firmware engineers to ensure designs meet specifications and reliability targets.

Experience Level

Senior-level — typically 10+ years of experience in UVM-based verification of FPGA systems and digital hardware verification.

Responsibilities

Primary verification responsibilities include planning, implementing, and executing tests and reporting results.

• Develop and implement UVM-based verification plans, testbenches, and test cases for FPGA/ASIC designs.
• Perform functional, system-level, and regression testing of digital hardware components.
• Create automation scripts and frameworks to run simulations and regressions.
• Analyze simulation results, debug issues, and work with designers to resolve defects.
• Measure and report coverage metrics; improve verification completeness and efficiency.
• Document test procedures, results, and maintain defect tracking records.
• Optimize verification processes and tools to improve productivity and accuracy.

Requirements

Key technical skills and experience required.

• Extensive experience with SystemVerilog and UVM for verification of FPGA/ASIC designs.
• Proficiency with simulation tools such as ModelSim or QuestaSim.
• Experience scripting for automation (Python or Perl).
• Familiarity with C/C++ for verification/support tasks and implementing models.
• Experience implementing bit-accurate models and debugging DSP logic.
• Knowledge of coverage metrics, debug tools, and formal verification techniques.
• Understanding of 4G/5G and O-RAN protocols relevant to radio/baseband verification.
• Strong problem-solving, analytical skills, and the ability to work in cross-functional teams.

Nice-to-have:

• Experience with VHDL/Verilog and FPGA development flows.
• Hardware/software co-verification experience and prior design experience.
• Verification of communication protocols and system-level integration testing.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: AirSpan Networks

Headquarters: Boca Raton, Florida, United States

AirSpan Networks is a global provider of 4G and 5G network solutions, offering small cells, radios, baseband units and software for operators, enterprises and industrial applications to deliver efficient, cost‑effective connectivity.