Technical Staff Engineer - Design

Job Title

Technical Staff Engineer - Design

Role Summary

Design engineer responsible for digital SoC architecture and implementation for high-performance, low-power wireless SoC products within the Wireless Solutions Group. The role drives RTL implementation, timing closure, and integration through tape-out while working closely with verification, physical design, validation, analog, and software teams across sites.

Experience Level

Senior — minimum 12+ years of experience in digital SoC design, with emphasis on low-power techniques and full ASIC design flow.

Responsibilities

Deliver RTL and system-level implementation of SoC designs and support integration and silicon bring-up.

• Contribute to SoC design from micro-architecture and RTL through synthesis, implementation, timing closure, and tape-out.
• Write and review RTL (Verilog/SystemVerilog); implement and verify low-power design techniques and power estimation flows.
• Define and apply timing constraints (SDC), perform static timing analysis and timing closure activities.
• Collaborate with verification teams to ensure coverage and compliance with test plans; participate in design reviews.
• Work with physical design teams to ensure successful integration and implementation.
• Support silicon validation and debug efforts; interact with FPGA and board-level validation as needed.
• Interface with external IP vendors to resolve integration issues and ensure IP compatibility.
• Communicate design status and technical issues across international, cross-functional teams.
• Travel: approximately 0%–25% as required.

Requirements

Technical must-have skills and relevant experience for immediate contribution to SoC design projects.

Must-have

• 12+ years of hands-on digital SoC design experience with focus on low-power design.
• Proficiency in RTL coding and methodologies (Verilog/SystemVerilog).
• Experience with synthesis flows, timing constraint (SDC) creation, and timing analysis/closure.
• Familiarity with ASIC design flow tools and checks (LINT, Formal, CDC/RDC).
• Knowledge of power estimation techniques, MBIST/DFT concepts, and low-power design implementation.
• Understanding of SoC architectures (ARM/MIPS), bus protocols (AMBA/AXI) and peripheral IPs (USB, Ethernet, I2C, SPI).
• Experience with Bus Matrix design and IP integration.
• Scripting experience (TCL, Perl, Python) for automation and flow development.
• Strong English verbal and written communication, analytical and problem-solving skills, and ability to work in international teams.

Nice-to-have

• Experience with verification methodologies (UVM/OVM) and validation/debug on FPGA or silicon boards.
• Knowledge of Bluetooth/BLE/Wi-Fi protocols and communication theory.
• Familiarity with security features and principles of functional-safety-compliant design.

Education Requirements

Required: Bachelor’s degree in Computer Engineering, Electrical Engineering, or a related technical field. Preferred: Master’s degree in Computer Engineering, Electrical Engineering, or related field.

About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.