Technical Lead Engineer - Network Validation & Characterization

Job Title

Technical Lead Engineer - Network Validation & Characterization

Role Summary

Lead validation and characterization for Meta custom silicon in networking domains from pre-silicon emulation through post-silicon bring-up and PVT characterization. Work with hardware, firmware, software, and manufacturing teams to define test plans, build lab automation, and scale characterization from single benches to production screens.

Experience Level

Senior - requires 12+ years of relevant industry experience focused on ASIC/SoC/NIC validation, characterization, or related hardware bring-up.

Responsibilities

Own end-to-end validation and characterization strategy and execution for networking domains across the silicon lifecycle, and provide technical leadership and cross-team coordination.

• Define and own test plans: measurement methodology, instrumentation, functional/performance coverage, corner coverage (P/V/T), and pass/fail criteria.
• Establish measurement best practices and ensure correlation across bench, emulation, and production test environments.
• Validate domain feature sets on emulation platforms pre-silicon and on silicon post-silicon.
• Review schematics, power delivery networks, high-speed interfaces, and board/platform configurations; provide early design and debuggability feedback.
• Write and maintain automation and analysis code to scale characterization from individual benches to many lab units.
• Lead debugging of cross-stack issues (silicon, firmware, driver, board, thermal, fabric/switch) and drive root-cause to closure with partners.
• Provide technical guidance and planning for validation engineers; mentor team members and improve data quality standards.
• Partner with manufacturing, production, and data center teams to transfer characterization learnings into production screens and fleet monitoring.

Requirements

Must-have technical skills and experience to perform the role.

• 12+ years of relevant industry experience in validation and characterization of complex ASICs, SoCs, NICs, or high-speed interfaces.
• Hands-on experience with PVT (Process / Voltage / Temperature) characterization.
• Ability to read and reason about schematics and power delivery networks or high-speed interface implementations.
• Proficiency in Python for test development, lab automation, and data analysis.
• Hands-on lab experience with domain-relevant instrumentation.

Nice-to-have:

• Experience taking a custom NIC or networking ASIC from first silicon to high-volume production and working directly with ODMs and silicon/IP vendors.
• Experience with networking instrumentation: traffic generators, protocol analyzers, high-speed scopes/BERTs, optics/cabling, and switches; RDMA (RoCE/InfiniBand) debugging; Ethernet performance tooling.
• Familiarity with Linux networking internals, kernel/userspace drivers, DPDK or verbs-level programming.
• Experience with SerDes tuning, link margining, FEC, errata characterization, or AI/HPC back-end fabrics.
• Experience building large-scale lab automation frameworks and characterization data pipelines.

Education Requirements

Minimum: Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience. Preferred: advanced degree (MS or PhD) in Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.