Technical Lead - DFT

Job Title

Technical Lead - DFT

Role Summary

Lead Design-for-Test (DFT) activities for ASIC/SoC projects within the engineering services team. Own DFT strategy, implementation, integration with design flows, and delivery of testability goals.

Manage and mentor engineers, coordinate with design, verification and manufacturing teams, and ensure DFT features meet coverage, timing, and yield requirements.

Experience Level

Senior-level. Specific years-of-experience not stated in the source.

Responsibilities

Primary responsibilities include:

• Define and implement DFT architecture and test strategies (scan, ATPG, compression, BIST) for digital designs.
• Integrate DFT flows and IP into synthesis/place-and-route flows and coordinate with verification teams.
• Run DFT tool flows, analyze test coverage, debug failing patterns, and tune designs to meet quality targets.
• Lead and mentor a team of DFT engineers; review deliverables and provide technical direction.
• Collaborate with manufacturing and silicon bring-up teams to validate testability and resolve yield issues.

Requirements

Key technical requirements (must-have vs nice-to-have):

• Must-have: Practical experience in DFT methodologies (scan insertion, ATPG, compression/BIST) and hands-on use of mainstream DFT tools.
• Must-have: Scripting skills (Tcl/Python/Perl) to automate flows and analyses.
• Must-have: Experience integrating DFT into synthesis/PNR flows and debugging test failures.
• Nice-to-have: Experience with silicon bring-up, yield analysis, and DFT for low-power or complex SoC designs.

Education Requirements

Not specified.

About the Company

Company: eInfochips

Headquarters: Bengaluru, India

eInfochips is a product engineering and semiconductor design services company offering embedded software, SoC design and verification, testing, and IoT solutions. It operates as part of Arrow Electronics, serving clients across industries worldwide.