Tech IP Library Characterization Engineer

Job Title

Tech IP Library Characterization Engineer

Role Summary

Join the TECHIP team to develop and run IP characterization flows for standard-cell and memory libraries, automate EDA tool flows, and validate models used for timing and power analysis. The role works across design, EDA vendors, and foundries to deliver characterization data and tooling for sign-off.

Experience Level

Entry-level - 0–3 years of relevant experience in library characterization, custom circuit design, CAD flow development, or VLSI-related work.

Responsibilities

Primary responsibilities focus on IP characterization, automation, and collaboration to enable accurate timing and power models for silicon sign-off.

• Develop, run, and maintain IP characterization flows for standard cells and memories.
• Automate EDA tools and large-scale data pipelines (tool orchestration, job automation, result aggregation).
• Build and validate Liberty timing and power models, including statistical variation formats.
• Analyze characterization data, create visualizations, and report findings to design and validation teams.
• Work with front-end views (Verilog/RTL), STA, and other pre-silicon flows to ensure model compatibility.
• Coordinate with multi-site teams, foundries, and third-party EDA vendors to resolve tool and modeling issues.
• Support sign-off methodology development and reliability validation across processes and foundries.

Requirements

Must-have technical skills and workplace capabilities; preferred items listed separately.

• Must-have: Strong knowledge of standard-cell and memory circuits and IP characterization workflows.
• Practical experience with EDA tool automation and UNIX/Linux scripting; proficiency in Python or Perl.
• Good analytical, debugging, and logical problem-solving skills.
• Familiarity with Liberty timing/power concepts and front-end Verilog views and tools.
• Ability to work effectively in multi-site teams and drive requirements with vendors.
• Nice-to-have: Experience with STA, physical design flows, spice/fast-spice simulation, DRC/LVS/ERC checks, statistical variation modeling (CCS, LVF), and DFT/BIST methodologies.

Education Requirements

Required: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Science, Engineering, or a related field. Preferred: Master’s in Electrical Engineering, Computer Engineering, or Computer Science. (Equivalent practical experience not specified explicitly.)

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.