Systems Validation Engineer, L10

Job Title

Systems Validation Engineer, L10

Role Summary

The L10 Systems Validation Engineer owns system-level validation and debug for Etched's accelerator platform at tray/rack scale. This role defines production readiness criteria, drives integration and bring-up across cards, interconnects, power, and thermal domains, and leads root-cause to verified fix for critical failures.

Experience Level

Senior — requires 10+ years of experience in system validation, platform bring-up, or a closely related discipline with solo ownership of multi-component platform integration.

Responsibilities

Primary responsibilities focus on end-to-end validation, debugging, and production gating of the L10 (tray/rack) system.

• Author and maintain the L10 system debug/diagnostic guide used by factory failure analysis and debug teams.
• Lead escalation, debug, and resolution of hardware failures across internal and field teams.
• Bring up and integrate accelerator cards, retimers/C2C fabric, power supplies/power integrity, thermal domains, and NVMe/IO subsystems.
• Execute system-level debug with no guaranteed starting point across hardware, firmware (BMC, BIOS, CPLD), and software.
• Build instrumentation, test automation, and ad-hoc tools to extract signals from pre-spec or unstable systems.
• Run sustained model workloads under thermal and power stress to validate stability and coverage.
• Partner with contract manufacturers to validate incomplete systems, close coverage gaps, and gate production ramp.
• Drive issue closure across hardware, firmware, software, thermal, power, and manufacturing teams; present data-backed readiness assessments to leadership.

Requirements

Must-have qualifications and core skills required for this role.

• 10+ years in system validation, platform bring-up, or tightly adjacent roles with direct ownership of L10 (tray/rack) integration on multi-component platforms.
• Hands-on signal integrity and power-integrity debug experience: SerDes, PCIe Gen5/6, Ethernet, HBM signaling.
• Experience validating AI accelerator or high-performance compute platforms that include accelerators, NVMe, high-speed interconnects, and complex power delivery.
• Proven ability to build coverage models that produce quantitative platform readiness metrics and gate criteria.
• Strong Linux skills and scripting in Python/Bash to build instrumentation, automation, and data-extraction tools.
• Ability to lead cross-functional RCA and drive fixes to verification in production-like environments.
• Willingness to travel occasionally overseas to contract manufacturers.

Nice-to-have qualifications:

• Familiarity with BMC/IPMI, UEFI/BIOS bring-up, and CPLD firmware debug.
• Experience with HBM or CSRAM memory subsystem validation.
• Background validating multi-rack or tray-level systems at hyperscaler or AI hardware scale.
• Experience using large-model inference workloads as stress and coverage tools.
• Prior experience working with ODM/CM partners in validation or NPI (e.g., Pegatron, Foxconn, Wistron).

Education Requirements

Not specified.

About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.