System Level Test (SLT) Content Development and Debug Engineer

Job Title

System Level Test (SLT) Content Development and Debug Engineer

Role Summary

Define and execute system-level test and platform validation plans for FPGA, transceiver, and multi-chip package products. Drive test planning, execution, automation, data analysis and debug to ensure testability, manufacturability and product quality.

Collaborate with hardware and software engineering, silicon validation, manufacturing and customer support teams to identify root causes, close test gaps and deliver platform readiness.

Experience Level

Mid-level; the posting does not specify years but expects practical experience in system/platform/silicon validation, test development and debugging.

Responsibilities

Primary responsibilities include planning and executing validation, automating test flows, and debugging failures to improve product quality.

• Develop test plans, methods, automated verification flows, and regression scripts for bench and ATE.
• Execute validation and characterization of system performance, timing, power and thermal behavior.
• Analyze test data and debug failures to identify root causes and implement workarounds or fixes.
• Work with cross-functional teams to evaluate integrated system performance and device functionality under various conditions.
• Contribute to product health indicators (PHI) and reduce defects per million (DPM) by closing test holes.
• Create platform validation documentation including risk assessments, test plans, user acceptance tests and reports.

Requirements

Must-have skills and experience; preferred items listed separately.

• Experience defining and executing system-level, platform, silicon or product validation plans and test methods.
• Experience developing automated test, regression or verification scripts and automation flows.
• Skilled in test data analysis and debugging failures to root cause.
• Experience working cross-functionally with hardware architecture/design, silicon validation, software, integration and manufacturing teams.
• Experience with bench or automatic test equipment (ATE) for validation and characterization.
• Strong system-level problem-solving, data-analysis and technical communication skills.

Nice-to-have:

• Experience generating test contents and vectors for FPGA or multi-chip package IP subsystems (core, transceiver, HPS, EMIF, LVDS, MIPI, etc.).
• Experience maintaining test frameworks, regression infrastructure or enterprise-service integrations.
• Knowledge of Verilog/VHDL, Quartus RTL flow, and scripting languages such as TCL and Python.
• Experience defining manufacturing test methodologies and deploying production test equipment.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or a related technical field.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.