Standard Cell Design Engineer
Design and improve digital standard-cell libraries, characterization flows, and methodologies for advanced process technologies (deep submicron, FinFET, SOI) at GlobalFoundries' Bengaluru site. The role focuses on circuit implementation, library characterization, validation, and methodology development to meet PDK and design-flow requirements.
Works closely with device, CAD, and chip teams to ensure library performance in chip-level scenarios and to implement practical solutions aligned with business needs.
Senior β typically 10+ years of relevant experience in digital standard-cell library development (posting lists 10 years preferred; specific education-to-experience bands are provided in Education Requirements).
Primary responsibilities include standard-cell architecture, circuit development, characterization, and methodology improvements.
Required technical skills, experience, and attributes.
Must-have:
Nice-to-have:
MS / M.Tech in Electrical or Electronics Engineering (posting specifies MS/M-Tech with 8 years relevant experience); PhD in Electronics/Electrical/VLSI (posting specifies PhD with 4 years relevant experience). The posting also emphasizes extensive practical experience (approximately 10 years preferred). No other degrees or certifications are specified.
Company: GlobalFoundries
Headquarters: Saratoga Springs, New York, USA
GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.
