Staff Verification Engineer - Silicon Design

Role Summary

We are seeking an experienced Verification Engineer specializing in server memory products. The primary responsibilities include leading the verification of DDR interfaces such as DFI, DDR5, and LPDDR5/LPDDR6 across various DIMMs. The ideal applicant should have extensive experience with SystemVerilog, UVM, and programming languages such as C/C++ and Python/Perl.

Experience Level

This position is geared towards professionals with substantial knowledge and experience in hardware verification environments.

Responsibilities

Key duties include:

• Collaborating with a team of verification engineers to develop and implement verification plans for DDR memory systems in server products.
• Understanding the integrated system's hardware, firmware, and software to ensure compatibility and performance of memory interfaces.
• Engaging with cross-functional teams to discuss RTL and micro-architecture aspects.
• Contributing to verification methodologies and providing insights on improvement.
• Assisting Post-Silicon teams in debugging performance, power, and functionality issues.

Requirements

Applicants should demonstrate experience in:

• Development of SystemVerilog and UVM testbenches and simulation environments for DDR memory systems.
• Collaboration with hardware, firmware, and software teams to identify memory architecture issues during the design process.
• Creating VIPs and BFMs for memory interfaces.
• Formal verification methods and tool usage beyond standard applications.
• Excellent communication and presentation skills.