Job Title
Staff Verification Engineer (IP Verification)
Role Summary
Join the System IP Interconnect team to develop and own verification environments for Arm Corelink Interconnect IP and NoCs. You will design and improve verification testbenches and flows for highly configurable, AMBA-compliant SoC connectivity used across mobile, IoT, networking and automotive applications.
This senior technical role focuses on formal and constrained-random verification, improving verification methodology, analysing simulation data, and mentoring team members.
Experience Level
Senior β minimum 6 years of relevant verification experience (see Requirements for details).
Responsibilities
The role is responsible for developing, improving and owning verification environments and flows from investigation through to closure.
- Specify and develop hardware verification testbenches for next-generation IP.
- Improve existing testbenches to increase performance, quality and efficiency.
- Review proposed design changes and assess verification complexity and effort.
- Own verification environments through debug, root-cause analysis and closure.
- Investigate and script new verification flows; optimise existing flows and EDA tool usage.
- Analyse simulation and formal results using data-science / machine-learning techniques to drive bug discovery and coverage closure.
- Drive verification methodology improvements in collaboration with engineering teams.
- Mentor and guide less-experienced engineers; provide technical leadership.
Requirements
Must-have technical skills and experience.
- Minimum 6 years verifying complex designs using formal property verification techniques.
- Practical experience with formal engines/tools (for example Cadence JasperGold).
- Experience with constrained-random verification and ownership of complex verification environments.
- Proficient in SystemVerilog.
- Software engineering fundamentals: object-oriented programming, data structures and algorithms.
- Scripting skills and experience developing verification flows and using EDA tools; able to plan and estimate work.
Preferred / nice-to-have:
- UVM verification methodology.
- Team leadership and mentoring experience.
- Microarchitecture experience: multiprocessing, cache coherence and bus protocols (e.g. AMBA5 CHI, AMBA4 ACE, AXI).
- Strong communication and teamwork skills; focused approach to problem analysis and solving.
Education Requirements
Not specified.
About the Company
Company: Arm
Headquarters: Cambridge, United Kingdom
ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.

Date Posted: 2026-05-19