Staff Structural Test Verification/Simulation Engineer
ArmJob Title
Staff Structural Test Verification/Simulation Engineer
Role Summary
Lead technical owner for structural test, design-for-test (DFT), and test verification/simulation for advanced Arm SoCs. The role spans pre-silicon verification, simulation of logic and memory test architectures, and coordination with post-silicon validation and manufacturing teams.
Position is based in Bengaluru and is responsible for driving test strategy, tool adoption, and yield/debug processes across global cross-functional teams.
Experience Level
Senior - 10+ years of relevant experience in DFT, structural test verification, or test engineering for complex ASICs/SoCs.
Responsibilities
Primary responsibilities include defining verification strategy, executing simulations, and coordinating with silicon and manufacturing teams.
- Define and drive pre-silicon verification and simulation strategy for logic and memory test architectures and DFT insertions.
- Lead simulation and verification of ATPG patterns and logic diagnostics to ensure fault coverage and defect detection.
- Lead simulation and verification of MBIST controllers, memory repair algorithms, and memory diagnostics architectures.
- Validate DFT insertions including boundary scan and scan-compression logic using industry tools and flows.
- Bridge pre-silicon simulation with post-silicon validation and ATE pattern bring-up; drive yield debug and root-cause analysis with manufacturing teams.
- Mentor and lead cross-functional engineering teams; establish test standards and integrate tools into verification flows.
Requirements
Must-have technical skills and experience. Preferred items listed separately.
- 10+ years experience in DFT, structural test verification, or test engineering for ASICs/SoCs.
- Expertise in logic diagnostics and ATPG pattern verification/simulation.
- Deep expertise in memory diagnostics and MBIST pattern verification/simulation.
- Hands-on experience with DFT languages and tools such as ICL, PDL, Siemens Tessent, and Synopsys TetraMAX.
- Proven experience in silicon validation, ATE pattern bring-up, and yield debug for high-volume manufacturing.
- Strong skills in hardware verification languages (SystemVerilog/UVM) and scripting for automation (Python, Perl, or Tcl).
- Excellent technical leadership and ability to coordinate cross-site execution.
Nice-to-have:
- Experience with IJTAG (IEEE 1687) and boundary-scan (IEEE 1149.x) standards.
- Experience with advanced process nodes (sub-7nm/5nm/3nm) and low-power DFT considerations.
Education Requirements
Not specified.
About the Company
Company: Arm
Headquarters: Cambridge, United Kingdom
ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.
