Job Title
Staff/Sr Staff Power Delivery Network (PDN) Engineer — MCU Digital Design (Automotive)
Role Summary
Senior PDN engineer on the Automotive MCU digital-design team responsible for designing, analyzing, and optimizing chip- and package-level power delivery networks for automotive MCUs/SoCs. Work closely with digital, physical, package, SI, and reliability teams to ensure power integrity, low-noise operation, and compliance with automotive reliability requirements.
Experience Level
Senior — typically 8–10 years of relevant experience in PDN, power integrity, or physical design for semiconductor products.
Responsibilities
Key responsibilities include PDN architecture, analysis, and signoff for automotive MCU/SoC designs and supporting silicon bring-up.
- Design and optimize chip- and package-level PDNs for automotive MCU/SoC products.
- Perform IR drop, electromigration (EM), and dynamic voltage-drop analysis across multiple power domains.
- Analyze power integrity issues: static/dynamic IR drop, power noise, simultaneous switching noise (SSN), and decoupling capacitor placement/optimization.
- Develop power-grid architectures for high-performance and low-power applications, including power straps, mesh structures, and via optimization.
- Collaborate with RTL, physical design, floorplanning, clock, and package teams for power-aware implementation and multi-voltage domain integration.
- Use EDA tools for PDN signoff and validation; create automation scripts and flows for PDN analysis and optimization.
- Support UPF-based low-power methodologies and participate in silicon bring-up, failure analysis, and power-related debugging.
- Ensure designs meet automotive quality and reliability standards.
Requirements
Must-have technical skills and experience. Education details are summarized separately below.
- 8–10 years of hands-on experience in PDN, power integrity, or physical-design roles for semiconductor products.
- Proven experience with IR drop, EM, SSN analysis, and decoupling strategies on-chip and at package level.
- Experience with PDN signoff using industry EDA tools and ability to develop automation scripts/flows.
- Experience collaborating across RTL, physical design, package, SI, and reliability teams to deliver power-aware implementations.
- Knowledge of multi-voltage-domain implementation and power-strap/via/mesh optimization.
- Experience supporting silicon bring-up, failure analysis, and power-integrity debugging in production flows.
- Familiarity with automotive-quality and reliability requirements.
- Nice-to-have: experience with automotive MCU/SoC products and packaging-level PDN optimization.
Education Requirements
Bachelor's or master’s degree in Electronics Engineering, Electrical Engineering, VLSI, or a related technical field.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

Date Posted: 2026-05-08