Staff/Sr Staff Electro-Optic Codesign Engineer

Job Title

Staff/Senior Staff Electro-Optic Co-design Engineer

Role Summary

Join the Laser Systems Architecture & Engineering team to lead electro-optic link co-design for Passage™, owning end-to-end simulation, co-design, and laboratory verification of photonic-electronic transceiver links from device models to system-level characterization.

This hands-on technical role connects photonic device modeling, analog circuit co-design, and measurement-to-simulation closure across tape-outs to ensure link performance across process corners.

Experience Level

Senior — typically PhD + 5+ years relevant experience, or MS + 8+ years of directly relevant industry experience in photonic ICs, transceivers, or optical interconnects.

Responsibilities

Primary responsibilities include building simulation infrastructure, driving photonic/analog co-design, and closing the loop with lab measurements.

• Develop and maintain electro-optic link simulation models spanning photonic device, propagation, and channel BER.
• Integrate multi-physics models combining optical propagation tools and analog circuit simulators into a coherent link analysis framework.
• Perform corner analyses, Monte Carlo variation sweeps, and PVT studies to bound link margin and provide specification recommendations.
• Co-optimize transmitter drivers and receiver front-ends with analog circuit teams via joint simulation across the optical-electrical boundary.
• Define test protocols and measurement sequences; iterate link models against measured silicon across process splits and device corners.
• Diagnose root causes of link performance issues and drive corrective design actions across device, circuit, and integration domains.
• Author and review photonic link architectural specifications and interface requirements for device and circuit teams.
• Contribute to product-level link planning and propose photonic/electronic co-design opportunities to improve margin, power, or yield.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Deep expertise in photonic device physics and system-level optical link design (silicon modulators, Ge photodetectors, passive WDM, optical amplifiers, coherent or intensity-modulated links).
• Hands-on proficiency with photonic simulation tools such as VPI Photonics, Lumerical INTERCONNECT/FDTD, or equivalent optical propagation and circuit co-simulation tools.
• Experience with analog and mixed-signal simulation tools: Cadence Virtuoso/Spectre, Verilog-A, or Keysight ADS for EO co-simulation.
• Proven experience developing and executing optical link budgets, corner analyses, and simulation-to-measurement closure workflows.
• High-speed lab skills: VNA/S-parameter characterization, optical spectrum analyzers, high-bandwidth oscilloscopes, BER test sets, optical modulation analyzers, and power meters.
• Proficiency in Python for simulation scripting, measurement automation, and statistical post-processing.
• Excellent written and verbal communication; able to drive architecture and specification discussions across device and circuit teams.
• Familiarity with SERDES architectures and equalization topologies (FFE, DFE, CTLE), CDR, and mixed-signal PHY co-design for high-speed interfaces.
• Ability to comply with U.S. export control laws as required.

Education Requirements

PhD in Electrical Engineering, Applied Physics, Physics, or a closely related photonics/optics discipline with 5+ years relevant experience; or MS plus 8+ years of directly relevant industry experience (photonic IC, transceiver, or optical interconnect). Fields referenced: Electrical Engineering, Applied Physics, Physics, photonics/optics. Equivalent industry experience is accepted as specified.

About the Company

Company: Lightmatter

Headquarters: Boston, Massachusetts, USA

Lightmatter develops photonic AI data-center infrastructure and optical chips for extreme-scale AI and HPC. The company invented the Passage 3D‑stacked photonics engine to provide high-bandwidth, low-latency interconnects across large-scale processors and raised $400M in Series D financing at a reported $4.4B valuation.