Staff SoC RTL Engineer
QuadricJob Title
Staff SoC RTL Engineer
Role Summary
Join Quadric's chip design team to develop and integrate SoC subsystems for a next-generation processor platform. The role focuses on SoC architecture definition, subsystem implementation, third-party IP integration, and driving Power/Performance/Area (PPA) improvements through the full chip design cycle.
This is a hands-on engineering position that requires cross-functional collaboration with verification, backend, and software teams to deliver customer-ready design releases.
Experience Level
Senior-level. Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience as specified by the employer.
Responsibilities
Primary responsibilities span SoC subsystem design, IP integration, and PPA/timing optimization.
- Own SoC-level subsystem development and integration of third-party IP (e.g., NoC, PCIe/UCIe, DDR, security IP).
- Contribute to SoC architecture definition based on application requirements.
- Package designs for customer releases and iterate rapidly on customer feedback.
- Develop and execute PPA optimization strategies and apply low-power digital design techniques.
- Drive timing-closure efforts across front-end and back-end through to tapeout.
- Balance single-stream latency versus scaled throughput in subsystem design choices.
- Debug complex cross-stack SW/HW issues and coordinate with software and verification teams.
- Deliver design releases for customer evaluation and integration.
Requirements
Must-have skills and experience are listed below; preferred qualifications follow.
Must-have
- Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience.
- Proficiency in SystemVerilog or Verilog.
- Strong background in computer architecture and low-power digital design; deep technical knowledge in at least one subsystem (Memory, I/O, or Compute).
- Proven experience integrating SoC subsystems and third-party IP; working knowledge of VCS and Verilog/C co-simulation.
- Experience driving PPA improvements and participating in timing-closure activities.
Nice-to-have
- Experience in logic synthesis and performance modeling.
- FPGA design experience.
- Familiarity with automotive safety (ASIL) practices and hardware security standards.
Education Requirements
BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field (as stated by the employer).
About the Company
Company: Quadric
Headquarters: Burlingame, California, United States
Quadric is building the world’s first supercomputer designed for the real-time needs of edge devices. Founded in 2016, the company empowers developers across industries with innovative general-purpose neural processing unit (GPNPU) architecture for neural network workloads. Co-founded by technologists from MIT and Carnegie Mellon, Quadric aims to enable groundbreaking technology development.
