Staff Signal Integrity Engineer

Job Title

Staff Signal Integrity Engineer

Role Summary

Individual contributor in the CHS Signal Integrity organization responsible for end-to-end SI/PI architecture, analysis, and signoff for mobile, compute, automotive and other connectivity platforms. Leads SI/PI decisions across SoC, package, board and external interfaces and drives cross-functional technical convergence.

Experience Level

Senior - typically 8+ years of experience in signal integrity, power integrity, or high-speed systems engineering.

Responsibilities

Primary responsibilities include system-level SI/PI ownership, architecture, and cross-team leadership from pre-silicon through production.

• Own end-to-end SI/PI closure for programs (pre-silicon to post-silicon to production).
• Define design targets and layout guidelines for high-speed interfaces and PDN.
• Influence early architecture and IP co-design across IC/PHY, package, and PCB.
• Ensure compliance with relevant standards (JEDEC, PCI-SIG, MIPI, IEEE).
• Drive correlation of simulation models with lab/silicon data and lead debug of eye collapse, jitter, crosstalk, and power noise issues.
• Lead design reviews, signoff decisions, and represent SI/PI at program leadership forums.
• Establish company-wide SI/PI methodologies and mentor other engineers.

Requirements

Must-have technical experience and demonstrated track record on high-speed systems.

• 8+ years in signal integrity, power integrity, or high-speed systems engineering; ownership of multiple tapeouts or high-volume products.
• Deep understanding of transmission line theory, EM fundamentals, SI/PI interactions, and jitter/noise coupling.
• Hands‑on experience with SI/PI simulation and analysis tools: HFSS, ADS, Sigrity, CST, SIwave, HSPICE.
• Hands‑on measurement experience: VNA, TDR, real‑time scopes.
• Proven ability to lead cross‑functional technical decisions across silicon, package, and board teams and to provide SI/PI signoff.
• Preferred: experience with packaging technologies (FCBGA, 2.5D/3D), data center/compute products, patents or standards contributions.

Education Requirements

Bachelor's degree in Science, Engineering, or related field plus 4+ years of relevant ASIC design/verification/validation/integration experience; OR Master's degree in Science/Engineering or related field plus 3+ years; OR PhD in Science/Engineering or related field plus 2+ years. Fields: science or engineering or related technical disciplines.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.