Staff RTL Design Engineer

Role Summary

As a Staff RTL Design Engineer at Arm, you will be part of the Systems team focused on designing next-generation interconnects for high-end markets. The role involves specification, microarchitecture, and RTL design of high-performance, energy-efficient interconnects, with a strong focus on functional safety.

Experience Level

Mid-level, requiring 4-8 years of experience in Electrical and/or Computer Engineering.

Responsibilities

Key responsibilities include:

• Understanding specifications and requirements of interconnect products.
• Defining micro-architecture and developing Verilog RTL logic design.
• Using power-aware design methodologies and tools like RTL PowerPro.
• Collaborating with the verification team on test plan development.
• Analyzing synthesis/timing reports to meet performance, power, and area goals.

Requirements

Must-have skills include:

• BS/MS in Electrical and/or Computer Engineering.
• Experience with System Verilog RTL design and synthesis.
• Familiarity with lint/CDC/RDC, SVA, and formal tools like Jasper/VC Formal.
• Competency with synthesis/STA tools such as Design Compiler/Genus.
• Strong interpersonal and teamwork skills.

Nice-to-have skills include:

• Experience with interconnect and bus architecture concepts.
• Knowledge of AMBA protocols (e.g., AMBA5 CHI, AXI).
• Experience with low-power design methodologies and analysis tools.

Education Requirements

BS/MS in Electrical and/or Computer Engineering.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.