Job Title
Staff Project Engineering Manager
Role Summary
Lead end-to-end delivery of Mixed-Signal IP and SoC/ASIC programs from concept through customer tape-out and silicon validation. Partner with analog and digital engineering, verification, physical design, validation, and product teams to manage schedules, risks, and deliverables.
This staff-level role combines technical engineering judgement with program leadership and direct customer engagement.
Experience Level
Senior β typically 5β10 years of experience in semiconductor development and program or project management.
Responsibilities
Primary responsibilities cover program management, technical engagement, customer communication, and cross-functional coordination.
- Own end-to-end program management for Mixed-Signal IP and SoC/ASIC projects: scoping, scheduling, milestone tracking, risk management, and customer delivery.
- Build and maintain integrated schedules spanning analog macro design and characterization, RTL design, verification, physical implementation (RTL-to-GDS), and silicon validation, capturing cross-discipline dependencies.
- Identify schedule risks, dependency conflicts, and resource gaps early; drive mitigation plans with engineering leads and management.
- Track deliverables across concurrent R&D teams and maintain program risk registers and single source of truth on status and actions.
- Coordinate analog macro programs: schematic, simulation, layout milestones, PVT characterization, and handoff to integration teams.
- Maintain a solid understanding of the RTL-to-GDS flow to enable credible schedule and risk assessment at each phase.
- Support silicon validation planning, coordinating test content, bring-up milestones, and customer evaluation timelines.
- Serve as the primary program interface to customers: communicate status, manage expectations, lead customer-facing design reviews, and ensure deliverable quality and contractual compliance.
- Drive alignment across analog, RTL, verification, CAD/EDA, physical design, validation, product management, and external partners (foundry/packaging).
Requirements
Must-have technical skills, program experience, and customer-facing capabilities.
- 5β10 years' experience in semiconductor development with program or project management responsibility for Mixed-Signal IP, SoC, or ASIC programs.
- Deep technical knowledge across analog macro design and digital RTL-to-GDS flows to assess risks and engage credibly with engineers.
- Experience coordinating analog macro deliverables (circuit design, layout, PVT characterization, integration handoff) within SoC or IP programs.
- Proven track record managing complex, multi-team semiconductor programs from specification through customer delivery, including tape-out coordination.
- Proficiency with project-management tools and methodologies (e.g., Jira, MS Project) and experience maintaining schedules and risk registers.
- Strong customer-facing skills with experience presenting program status, managing expectations, and resolving technical and schedule issues for enterprise customers.
- Familiarity with quality management system processes applicable to IP and semiconductor delivery (e.g., ISO 9001, IATF 16949).
- Nice-to-have: hands-on familiarity with specific IP types (PLLs, SerDes PHYs, I/O buffers, LDOs) and prior coordination with foundry and packaging partners.
Education Requirements
Bachelor of Science in Electrical Engineering, Computer Engineering, or a related technical discipline (BS). The posting specifies a BS in EE, CE, or related technical field.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Date Posted: 2026-05-14