Staff Product Engineer - Physical Verification

Job Title

Staff Product Engineer - Physical Verification

Role Summary

Lead product engineering for physical verification signoff flows, developing and maintaining rule decks and methodologies (DRC, LVS, PERC, ESD) and driving technical delivery for customer tapeouts. Work closely with customers, foundries, R&D, and product teams to translate requirements into reliable, scalable verification solutions.

Experience Level

Senior - Staff level. Expect approximately 7–9+ years of relevant physical verification or runset development experience.

Responsibilities

Primary duties focused on developing verification flows, coordinating across teams, and ensuring successful customer tapeouts.

• Develop, enhance, and maintain ICV/Calibre/PVS runsets and methodologies for DRC, LVS, PERC, ESD, and related signoff checks.
• Serve as the primary technical interface to customers and foundries to translate requirements and resolve verification issues.
• Plan and execute projects: align resources, schedules, risks, and deliverables to meet tapeout milestones.
• Automate and improve tools, runsets, and flows using Python, TCL, Perl, or shell scripting.
• Make architectural decisions, propose solutions for advanced nodes and 3DIC challenges, and mentor team members.
• Deliver technical presentations, workshops, training, and product demonstrations to customers and foundries.
• Collaborate with cross-product teams to evaluate and validate new verification features and ensure interoperability.

Requirements

Must-have technical skills and professional experience required to perform the role.

• Hands-on experience with at least one physical verification tool (ICV, Calibre, Pegasus/PVS, or equivalent) and runset development for DRC/LVS/PERC/ESD across multiple nodes.
• Strong scripting and automation skills in Python, TCL, Perl, or shell for runset development and verification flow automation.
• Experience with software development practices: project planning, version control (Git), and bug tracking systems.
• Proven customer-facing skills: debugging tapeout blockers, working with design teams, and producing reproducible bug reports for R&D.
• Ability to manage multiple customer projects and releases with attention to versioning and release quality.
• Excellent communication and teamwork skills for cross-time-zone collaboration with global teams.
• Technical leadership: making tradeoffs, driving continuous improvement, and mentoring engineers.
• Nice-to-have: experience with advanced-node, 3DIC, HBM, or ESD verification challenges and signoff constraints.

Education Requirements

Required: BSc in Electrical Engineering (or equivalent) with at least 9 years of relevant experience, or MSc with at least 7 years of relevant experience. Equivalent practical experience in physical verification/runset development is accepted where specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.