Staff Physical Design Engineer

Job Title

Staff Physical Design Engineer

Role Summary

Staff ASIC engineer focused on physical design or static timing analysis (STA) supporting customer AI/ML, HPC and compute accelerator ASIC programs. You will work hands-on in EDA flows from design through tape-out and production, collaborating with cross-functional engineering teams and customer partners.

Benefits include health/dental/vision, life and disability insurance, FSA/HSA, 401(k) with match, ESPP, generous PTO, annual bonus and equity.

Experience Level

Senior (Staff). The posting implies a senior-level role (staff) but does not state explicit years of experience.

Responsibilities

Primary responsibilities supporting customer ASIC programs and ensuring designs meet tape-out and production requirements.

• Support customer AI/ML and compute ASIC programs through design, test, packaging, fabrication, bring-up, and production.
• Execute physical design or STA validation flows to verify timing, PPA, and tape-out readiness at advanced nodes.
• Provide guidance on EDA tools, design flows, and methodology best practices for high-performance silicon.
• Identify and help mitigate risks to quality, schedule, or dependencies; track program status and communicate with stakeholders.
• Collaborate with cross-functional teams to resolve implementation challenges in AI and compute architectures.
• Stay current with AI silicon trends, chiplet architectures, and high-performance design methodologies.

Requirements

Must-have technical skills and practical experience required to perform the role.

• Hands-on experience in physical design or STA and relevant EDA tools and flows.
• Experience with multiple ASIC tape-outs; advanced nodes preferred.
• Strong understanding of PPA trade-offs in high-performance designs and low-power design techniques.
• Exposure to broader ASIC flows (logic simulation, test, packaging, bring-up).
• Scripting proficiency (TCL, shell, or similar) for automation and tool flows.
• Strong communication and collaboration skills to work with customer and internal engineering teams.

Nice-to-have:

• Experience with AI/ML accelerators, HPC or large-scale compute SoCs.
• Exposure to SERDES/high-speed interfaces, RTL design, microarchitecture, or front-end flows.
• Knowledge of DFT (scan, MBIST, repair).

Education Requirements

Not specified.

About the Company

Company: CyberCoders

Headquarters: Irvine, California, United States

CyberCoders is a technology-focused recruiting and staffing firm that matches professionals in software, engineering, IT, and related fields with employers through job placement, recruiting services, and talent sourcing solutions.