Job Title
Staff Physical Design Engineer (ASIC, Physical Design or STA)
Role Summary
Hands-on Staff ASIC engineer responsible for physical design or STA validation and execution for advanced AI/ML and high-performance compute ASICs. Support customer programs from design through production and collaborate with cross-functional teams on advanced-node and chiplet architectures.
On-site opportunities in San Jose, CA; Irvine, CA; or Fort Collins, CO. The role emphasizes technical execution with potential for broader technical ownership.
Experience Level
Senior (Staff level). The posting expects engineers with multiple ASIC tape-outs and advanced-node experience; no explicit years-of-experience requirement stated.
Responsibilities
Primary responsibilities focus on physical implementation, validation, and program support for customer ASIC projects.
- Execute and validate physical design or STA flows to meet tape-out requirements for advanced nodes.
- Support customer ASIC programs across design, test, packaging, fabrication, bring-up, and production.
- Provide guidance on EDA tools, design flows, and methodology best practices for high-performance silicon.
- Identify risks to quality, schedule, or dependencies and contribute to mitigation plans.
- Collaborate with cross-functional teams to resolve complex implementation challenges.
- Stay current with emerging AI silicon trends, IP, and implementation methodologies.
- Support program communication across engineering and internal partner teams.
Requirements
Key must-have skills and additional preferred experience.
-
Must-have: Hands-on physical design or STA experience with multiple ASIC tape-outs (advanced nodes preferred).
- Strong understanding of PPA tradeoffs and low-power design for compute-intensive systems.
- Familiarity with EDA tools, validation flows, and methodology for physical implementation.
- Scripting skills (TCL, shell, or similar) and exposure to broader ASIC flows (logic simulation, test, packaging).
- Strong communication and collaboration skills.
- Must be currently authorized to work in the United States without sponsorship.
Nice-to-have:
- Experience with AI/ML accelerators, HPC, or large-scale compute SoCs.
- Exposure to SERDES or other high-speed interfaces.
- Experience in RTL design, microarchitecture, front-end flows, or DFT (scan, MBIST, repair).
Education Requirements
Not specified.
About the Company
Company: Tenstorrent
Headquarters: Austin, Texas, United States
Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.

Date Posted: 2026-07-02