Staff Package Design Engineer

Job Title

Staff Package Design Engineer

Role Summary

The Staff Package Design Engineer will design and deliver advanced semiconductor package solutions for automotive, industrial, and embedded computing products. This role works at the intersection of IC design, package development, and manufacturing to enable high-performance, reliable packages.

The position sits on the Advanced Silicon Packaging team and collaborates with silicon design, SI/PI, thermal, reliability, product engineering, and manufacturing teams in the Tempe, AZ office.

Experience Level

Senior - minimum 4+ years of hands-on experience in package CAD layout or advanced package development; 6+ years preferred.

Responsibilities

Execute end-to-end package design and manage release deliverables.

• Perform package layout and development for power modules, FCBGA, SiP, WLCSP, multi-chip modules, and related technologies.
• Develop and maintain package CAD databases and design documentation to support DFM/DFA and manufacturability.
• Manage the package design cycle: schematic creation, netlist import, footprint assignment, layout implementation, verification, and manufacturing release outputs (Gerber/drill, fabrication and assembly drawings, bump maps).
• Create and modify substrate and RDL layouts, escape routing, stack-ups, and power/ground distribution features.
• Collaborate with SI/PI, thermal, reliability, DFT, silicon design, product engineering, and OSAT/manufacturing teams for package co-optimization and design reviews.
• Ensure designs meet foundry, OSAT, and substrate vendor design rules, including DRC/LVS and netlist connectivity checks.
• Support ECO cycles, revision control, and release documentation during project lifecycle.

Requirements

Must-have technical skills and experience to perform the role.

• 4+ years of hands-on experience in package CAD layout, substrate design, or advanced package development.
• Proven experience with advanced package types and multi-die/chiplet architectures (power modules, FCBGA, SiP, WLCSP, substrate-based packages).
• High proficiency with package CAD tools such as Cadence Allegro Package Designer, Siemens Xpedition Substrate Integrator, or equivalent.
• Experience applying package design rules, substrate/vendor constraints, OSAT assembly requirements, and DFM/DFA principles for manufacturing release.
• Experience interfacing with Tier-1 OSATs, substrate suppliers, foundries, silicon design, and product engineering teams.
• Working understanding of SI/PI fundamentals, high-speed routing, impedance control, power/ground distribution, and crosstalk mitigation.
• Strong communication, presentation, and technical documentation skills in global, cross-functional engineering environments.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Microelectronics, Materials Science, or a related technical discipline (as stated in the posting).

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.