Staff Mixed Signal Design Verification Engineer

Job Title

Staff Mixed Signal Design Verification Engineer

Role Summary

Lead verification engineer within Qorvo's Power Management division responsible for top-level design verification of mixed-signal and power-management ICs. The role focuses on creating metric-driven verification plans, developing constrained-random tests and models, and ensuring first-pass silicon success.

The team delivers power-loss protection, PMICs, motor control, and battery management solutions for mobile, consumer, IoT and industrial applications and works closely with design, test, and customer teams.

Experience Level

Senior-level (Professional). The posting specifies 10+ years of experience in AMS design or verification.

Responsibilities

Primary responsibilities include verification planning, test and model development, and cross-functional collaboration to validate device functionality and performance.

• Act as customer-facing verification lead for catalog and custom power-management ICs (motor drivers, power-loss protection, point-of-load, battery management).
• Develop and execute metric-driven design verification plans based on IC functional, performance, and test specifications with a focus on customer use-cases.
• Create constrained-random tests and automated checkers within a top-level design verification (TLDV) UVM environment.
• Build high-performance RNM or Verilog-AMS models to support top-level simulation and co-simulation.
• Collaborate with design teams to debug and resolve issues discovered during verification and during silicon bring-up.
• Partner with internal design and test teams to ensure device first-pass testability.
• Continuously improve and align verification methodologies with industry best practices and automate verification tasks where applicable.
• Support up to 10% domestic or international travel as required.

Requirements

Must-have skills and experience.

• 10+ years of experience in AMS design or verification of analog and power-management ICs.
• Proficiency in UVM environments, including test cases, coverage models, and global checkers.
• In-depth knowledge of power-management building blocks: LDOs, amplifiers, bandgaps, DCDC regulators, oscillators, and asynchronous state machines.
• Strong problem-solving, simulation debug, and silicon debug skills.
• Expertise with mixed-signal simulation concepts and tools such as SPICE/Spectre, event-based simulators, and co-simulation environments.
• Effective communication and collaboration skills; experience working with cross-functional and customer teams.

Preferred / Nice-to-have:

• Experience with Top-Down Design Methodology.
• Proficiency in shell or Python scripting.
• Familiarity with SV-UDN / EENET modeling techniques.
• Experience with both GUI and command-line simulation flows.
• Proficiency with SystemVerilog assertions and functional coverage; understanding of AI integration into verification workflows.

Education Requirements

Advanced degree (e.g., Master’s or PhD) in Electrical Engineering or a related field with a strong focus on mixed-signal circuit design and verification.

Company: https://www.qorvo.com

About the Company

Company: Qorvo

Headquarters: Greensboro, NC, US

Qorvo supplies innovative semiconductor solutions that enhance connectivity and power for a variety of applications, including consumer electronics, automotive, and healthcare. With a focus on RF and power solutions, Qorvo combines technology leadership and global manufacturing to address complex challenges in fast-growing industries. Their commitment to excellence and innovation drives them to shape the future of wireless communications.