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Staff Memory Design Engineer, DRAM

Micron Technology
March 27, 2026
Full-time
On-site
Boise, Idaho, United States
Level - Mid-Career

Role Summary

The Staff Memory Design Engineer, DRAM collaborates with global teams to design and analyze digital and analog circuits for next-generation memory products. This role focuses on optimizing product performance through circuit design and validation.

Experience Level

Mid-level; requires at least 6 years of experience in DRAM design, product, or system.

Responsibilities

The key responsibilities include:

  • Design, optimize, and validate memory, logic, and analog circuits.
  • Model parasitics and support design validation, reticle experiments, and tape-out revisions.
  • Guide and manage physical layout, including floor-planning, placement, and routing.
  • Perform modeling and simulation using industry-standard tools.
  • Collaborate across teams to improve design quality and ensure manufacturable solutions.

Requirements

The ideal candidate must possess the following qualifications:

  • BS or MS in Electrical Engineering or related field.
  • 6 years of experience in DRAM design, product, or system.
  • Coursework in CMOS circuit design, VLSI, and digital circuit design.
  • Experience with Cadence Virtuoso.
  • Understanding of physical layout, circuit floor planning, and device reliability.
  • Experience using FINESIM, HSPICE, and VERILOG.

Education Requirements

BS or MS in Electrical Engineering or related field.


About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

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Date Posted: 2026-03-27