Staff Layout Design Engineer

Role Summary

We are looking for a dedicated Staff Layout Design Engineer with a strong background in semiconductor technology, capable of leading the development of complex layout designs within our Logic Libraries IP team.

Experience Level

This position requires a minimum of 5 years of hands-on experience in standard cell or logic library layout development, or at least 3 years with an advanced degree.

Responsibilities

• Design standard cell layouts for a variety of digital structures, utilizing both traditional and advanced routing technologies.
• Conduct thorough sign-off checks to ensure compliance with foundry rules and standards.
• Collaborate with cross-functional teams globally to address design challenges and enhance layout methodologies.
• Lead design reviews to improve the manufacturability and performance of standard cell libraries.
• Automate design workflows using scripting languages to enhance productivity and quality metrics.

Requirements

Applicants must have proficiency with major EDA tools used in layout development, alongside strong scripting capabilities in languages like Python and TCL. Candidates should also have experience working with Process Design Kits (PDKs) from leading foundries. A thorough understanding of digital layout fundamentals is critical for this role.

Education Requirements

A Bachelor’s degree in a relevant field is required, with a preference for candidates holding an advanced degree. Practical experience in layout design is essential.