Staff HSIO Digital & Mixed Signal Design Engineer

Job Title

Staff HSIO Digital & Mixed Signal Design Engineer

Role Summary

Senior digital and mixed-signal engineer responsible for HSIO (high-speed I/O) digital design for die-to-die/chiplet interfaces on AI production SoC platforms. Work closely with analog, system, software and silicon teams to define architecture, implement digital logic, verify functionality, and drive productization.

Contribute to next-generation HSIO IP used in SoC products and optimize performance, SI/PI, and testability for production-ready designs.

Experience Level

Senior level. See Education Requirements for degree-linked experience expectations.

Responsibilities

Accountabilities for this role include design, verification and cross-domain collaboration to deliver HSIO IP into production SoCs.

• Architect and implement digital logic for HSIO PHY and controller blocks targeting die-to-die/chiplet interfaces.
• Drive RTL development, synthesis constraints, timing closure, CDC mitigation and verification activities.
• Collaborate with analog/mixed-signal, SI/PI, packaging and system teams to resolve cross-domain trade-offs.
• Perform performance optimization, power/latency trade-off analysis and silicon bring-up support.
• Support DFT, test integration and production-readiness activities.
• Document designs, participate in design reviews, and mentor junior engineers as needed.

Requirements

Key skills and experience needed. Must-have items are first; nice-to-have items follow.

• Must-have: Hands-on experience with HSIO PHY IP (examples: UCIe, BOW, PCIe) and digital design for high-speed serial interfaces.
• Deep understanding of high-speed serial protocols and related design trade-offs (timing, power, signal integrity).
• Practical experience across the digital design flow: RTL, synthesis, timing closure, CDC, verification methodologies and silicon bring-up.
• Experience collaborating with analog/mixed-signal and system teams to integrate digital-on-top with PHY and package constraints.
• Experience with SI and PI modeling and applying results to digital design decisions.
• Nice-to-have: Familiarity with SoC protocols such as AXI/CHI/CXS.B/CXL/PCIe/UA-Link, Ethernet PMA/PMD/PCS layers, and formal DFT flows.
• Prior experience delivering HSIO for production SoCs or chiplet/die-to-die implementations is preferred.

Education Requirements

BS in Electrical Engineering with 10+ years of experience, MS in Electrical Engineering with 8+ years of experience, or PhD in Electrical Engineering with 5+ years of experience. The posting explicitly references Electrical Engineering; related technical degrees may be relevant but are not specified.

About the Company

Company: Samsung Semiconductor

Headquarters: San Diego, California, United States

Samsung Semiconductor is a global leader in semiconductor technology, providing innovative solutions for diverse applications including smartphones, electric vehicles, and data centers. As part of Samsung's Advanced Institute of Technology, the company focuses on cutting-edge research in areas such as CPU microarchitecture, AI, and HPC, fostering a diverse and inclusive work environment for its employees to thrive and innovate.